Digital Logic Circuits Reduction:

Language: English

Published by LAP LAMBERT Academic Publishing Jan 2016, 2016

3659831794 / 9783659831799

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Seller: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, GermanyBuchWeltWeit Ludwig Meier e.K.

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This item is printed on demand - it takes 3-4 days longer - Neuware -Nowadays, designers of digital logic circuits are looking for getting as maximum accuracy as possible for the designed circuits with possible minimum consumed time, and finally with as minimum effort as possible. Overcoming all of these constraints cannot be achieved by traditional approaches even when using Karnaugh-Maps, especially when using more than 4-input variables. The most important problem facing the designers is selecting which and how the optimum solution(s) are possible, taking into consideration the order of variables to decide how many equivalent digital logic circuits can be extracted from the original one. This book depends on the Binary Decision Diagram approach to be used to represent in symbolic manner a set of input-variables. It is largely used in the field of formal checking. The variable ordering is a very important step in the Binary Decision Diagram optimization process. A good order of variables will reduce considerably the size of a Binary Decision Diagram. We hope you will enjoy reading the fruit of our efforts and that this book will help you to obtain a general perspective on Binary Decision Diagrams. 56 pp. Englisch.

Seller Inventory # 9783659831799

Title
Digital Logic Circuits Reduction:
Author
Nadire Cavus
Publisher
LAP LAMBERT Academic Publishing Jan 2016
Publication year
2016
Condition
Neu
Binding
Taschenbuch
Language
English
ISBN 10
3659831794
ISBN 13
9783659831799
Item weight
102 grams
Dimensions
220x150x4 mm

BuchWeltWeit Ludwig Meier e.K.

Bergisch Gladbach, Germany

5-star seller

AbeBooks seller since January 11, 2012

Shipping rates from Germany to U.S.A.

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First item£ 19.76£ 19.76
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BuchWeltWeit Ludwig Meier e.K.

Germany