Design & Analysis of Fast Adder using Quaternary Signed Digit (QSD)

Language: English

Published by LAP LAMBERT Academic Publishing Okt 2018, 2018

6139913497 / 9786139913497

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This item is printed on demand - Print on Demand Titel. Neuware -Processors with high computational speed are necessary nowadays to solve problems faster and accurately. The speed of the processors depends on the speed of the basic processing unit. To increase the speed of these basic units we need fast adders and subtractors. This book discusses the QSD (Quaternary Sign Digit) adder unit which is faster than any other adders. The main problem of the adder is that the carry propagates from one stage to another increase. This can be reduced by using the QSD adder. It uses the base-four number system in which will help in reducing the number of bits required to store in the memory unit. This adder can be used for high-speed computing processors where the area is not a concern.VDM Verlag, Dudweiler Landstraße 99, 66123 Saarbrücken 52 pp. Englisch.

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Title
Design & Analysis of Fast Adder using Quaternary Signed Digit (QSD)
Author
Ravi Shankar Mishra
Publisher
LAP LAMBERT Academic Publishing Okt 2018
Publication year
2018
Condition
Neu
Binding
Taschenbuch
Language
English
ISBN 10
6139913497
ISBN 13
9786139913497
Item weight
96 grams
Dimensions
220x150x4 mm

buchversandmimpf2000

Emtmannsberg, BAYE, Germany

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