Coupled Data Communication Techniques for High-Performance and Low-Power Computing

Robert Drost

ISBN 10: 1461426170 / ISBN 13: 9781461426172

Published by Springer US, Springer US Sep 2012, 2012

About this Item

This item is printed on demand - Print on Demand Titel. Neuware -Wafer-scale integration has long been the dream of system designers. Instead of chopping a wafer into a few hundred or a few thousand chips, one would just connect the circuits on the entire wafer. What an enormous capability wafer-scale integration would offer: all those millions of circuits connected by high-speed on-chip wires. Unfortunately, the best known optical systems can provide suitably ne resolution only over an area much smaller than a whole wafer. There is no known way to pattern a whole wafer with transistors and wires small enough for modern circuits. Statistical defects present a rmer barrier to wafer-scale integration. Flaws appear regularly in integrated circuits; the larger the circuit area, the more probable there is a aw. If such aws were the result only of dust one might reduce their numbers, but aws are also the inevitable result of small scale. Each feature on a modern integrated circuit is carved out by only a small number of photons in the lithographic process. Each transistor gets its electrical properties from only a small number of impurity atoms in its tiny area. Inevitably, the quantized nature of light and the atomic nature of matter produce statistical variations in both the number of photons de ning each tiny shape and the number of atoms providing the electrical behavior of tiny transistors. No known way exists to eliminate such statistical variation, nor may any be possible.Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg 224 pp. Englisch.

Seller Inventory # 9781461426172

Bibliographic Details

• Title: Coupled Data Communication Techniques for High-Performance and Low-Power Computing
• Publisher: Springer US, Springer US Sep 2012
• Publication Date: 2012
• Language: English
• ISBN 10: 1461426170
• ISBN 13: 9781461426172
• Binding: Taschenbuch
• Condition: Neu
• Dimensions: 235W x 155H x 13D millimeters 235 millimeters width by 155 millimeters height by 13 millimeters depth
• Weight: 347 grams

About this title

Synopsis

Wafer-scale integration has long been the dream of system designers. Instead of chopping a wafer into a few hundred or a few thousand chips, one would just connect the circuits on the entire wafer. What an enormous capability wafer-scale integration would offer: all those millions of circuits connected by high-speed on-chip wires. Unfortunately, the best known optical systems can provide suitably ?ne resolution only over an area much smaller than a whole wafer. There is no known way to pattern a whole wafer with transistors and wires small enough for modern circuits. Statistical defects present a ?rmer barrier to wafer-scale integration. Flaws appear regularly in integrated circuits; the larger the circuit area, the more probable there is a ?aw. If such ?aws were the result only of dust one might reduce their numbers, but ?aws are also the inevitable result of small scale. Each feature on a modern integrated circuit is carved out by only a small number of photons in the lithographic process. Each transistor gets its electrical properties from only a small number of impurity atoms in its tiny area. Inevitably, the quantized nature of light and the atomic nature of matter produce statistical variations in both the number of photons de?ning each tiny shape and the number of atoms providing the electrical behavior of tiny transistors. No known way exists to eliminate such statistical variation, nor may any be possible.

From the Back Cover

Designers of next-generation high-performance computer systems face a host of technical challenges. For the past several decades, rising clock frequencies and increased chip integration have fueled the growth of computer performance. Now these trends have slowed: power and complexity constrains further increases in clock frequencies, and economic realities limit the pace of Moore's Law. Coupled data communication provides a way forward, and this book, Coupled Data Communication Techniques for High-Performance and Low-Power Computing, gives a comprehensive overview for such coupled data techniques. Coupled data communication allows chips to communicate―capacitively or inductively―over short distances between chips without solder, and fundamentally shifts the design paradigm from single-chip integration to single-package integration. This book covers the state-of-the-art in the circuits, architectures, and chip packaging for this novel chip-to-chip communication technology and showcases its potential to drive the coming decades of industry growth. Coupled Data Communication Techniques for High-Performance and Low-Power Computing should be of interest to students and designers in circuits and system architecture.