Computer Organization and Design, Revised Printing, Third Edition: The Hardware/Software Interface

What’s New in the Third Edition, Revised Printing

The same great book gets better! This revised printing features all of the original content along with these additional features:

• Appendix A (Assemblers, Linkers, and the SPIM Simulator) has been moved from the CD-ROM into the printed book

• Corrections and bug fixes

Third Edition features

New pedagogical features

• Understanding Program Performance
- Analyzes key performance issues from the programmer’s perspective
• Check Yourself Questions
- Helps students assess their understanding of key points of a section
• Computers In the Real World
- Illustrates the diversity of applications of computing technology beyond traditional desktop and servers
• For More Practice
- Provides students with additional problems they can tackle
• In More Depth
- Presents new information and challenging exercises for the advanced student

New reference features

• Highlighted glossary terms and definitions appear on the book page, as bold-faced entries in the index, and as a separate and searchable reference on the CD.
• A complete index of the material in the book and on the CD appears in the printed index and the CD includes a fully searchable version of the same index.
• Historical Perspectives and Further Readings have been updated and expanded to include the history of software R&D.
• CD-Library provides materials collected from the web which directly support the text.


In addition to thoroughly updating every aspect of the text to reflect the most current computing technology, the third edition

• Uses standard 32-bit MIPS 32 as the primary teaching ISA.
• Presents the assembler-to-HLL translations in both C and Java.
• Highlights the latest developments in architecture in Real Stuff sections:
- Intel IA-32
- Power PC 604
- Google’s PC cluster
- Pentium P4
- SPEC CPU2000 benchmark suite for processors
- SPEC Web99 benchmark for web servers
- EEMBC benchmark for embedded systems
- AMD Opteron memory hierarchy
- AMD vs. 1A-64

New support for distinct course goals

Many of the adopters who have used our book throughout its two editions are refining their courses with a greater hardware or software focus. We have provided new material to support these course goals:

New material to support a Hardware Focus

• Using logic design conventions
• Designing with hardware description languages
• Advanced pipelining
• Designing with FPGAs
• HDL simulators and tutorials
• Xilinx CAD tools

New material to support a Software Focus

• How compilers work
• How to optimize compilers
• How to implement object oriented languages
• MIPS simulator and tutorial
• History sections on programming languages, compilers, operating systems and databases


On the CD

• NEW: Search function to search for content on both the CD-ROM and the printed text
• CD-Bars: Full length sections that are introduced in the book and presented on the CD
• CD-Appendixes: Appendices B-D
• CD-Library: Materials collected from the web which directly support the text
• CD-Exercises: For More Practice provides exercises and solutions for self-study
• In More Depth presents new information and challenging exercises for the advanced or curious student
• Glossary: Terms that are defined in the text are collected in this searchable reference
• Further Reading: References are organized by the chapter they support
• Software: HDL simulators, MIPS simulators, and FPGA design tools
• Tutorials: SPIM, Verilog, and VHDL
• Additional Support: Processor Models, Labs, Homeworks, Index covering the book and CD contents

Instructor Support

Instructor support provided on textbooks.elsevier.com:

• Solutions to all the exercises
• Figures from the book in a number of formats
• Lecture slides prepared by the authors and other instructors
• Lecture notes

*For the Revised Printing, Appendix A appears in the printed book rather than on the CD. This is the only change.
*Explains the latest benchmarking software including SPEC CPU2000 suite for processors, SPEC Web99 for web servers, and EEMBC for embedded systems
*Features the latest developments of the Intel IA-32 architecture as well as the Power PC 604, the AMD Opteron Memory, and the Intrinsity FastMATH processor.
*Compares MIPs assembler code to both C and Java

ACM named John L. Hennessy a recipient of the 2017 ACM A.M. Turing Award for pioneering a systematic, quantitative approach to the design and evaluation of computer architectures with enduring impact on the microprocessor industry. John L. Hennessy is a Professor of Electrical Engineering and Computer Science at Stanford University, where he has been a member of the faculty since 1977 and was, from 2000 to 2016, its tenth President. Prof. Hennessy is a Fellow of the IEEE and ACM; a member of the National Academy of Engineering, the National Academy of Science, and the American Philosophical Society; and a Fellow of the American Academy of Arts and Sciences. Among his many awards are the 2001 Eckert-Mauchly Award for his contributions to RISC technology, the 2001 Seymour Cray Computer Engineering Award, and the 2000 John von Neumann Award, which he shared with David Patterson. He has also received seven honorary doctorates.

ACM named David A. Patterson a recipient of the 2017 ACM A.M. Turing Award for pioneering a systematic, quantitative approach to the design and evaluation of computer architectures with enduring impact on the microprocessor industry. David A. Patterson is the Pardee Chair of Computer Science, Emeritus at the University of California Berkeley. His teaching has been honored by the Distinguished Teaching Award from the University of California, the Karlstrom Award from ACM, and the Mulligan Education Medal and Undergraduate Teaching Award from IEEE. Patterson received the IEEE Technical Achievement Award and the ACM Eckert-Mauchly Award for contributions to RISC, and he shared the IEEE Johnson Information Storage Award for contributions to RAID. He also shared the IEEE John von Neumann Medal and the C & C Prize with John Hennessy. Like his co-author, Patterson is a Fellow of the American Academy of Arts and Sciences, the Computer History Museum, ACM, and IEEE, and he was elected to the National Academy of Engineering, the National Academy of Sciences, and the Silicon Valley Engineering Hall of Fame. He served on the Information Technology Advisory Committee to the U.S. President, as chair of the CS division in the Berkeley EECS department, as chair of the Computing Research Association, and as President of ACM. This record led to Distinguished Service Awards from ACM, CRA, and SIGARCH.