The field of digital computer architecture has grown explosively in the past two decades. Through a steady stream of experimental research, tool-building efforts, and theoretical studies, the design of an instruction-set architecture has been transformed into one of the most quantitative branches of computer technology. However, this explosive growth has led to unprecedented harware complexity and almost intolerable development costs. The challenge faxing current and future computer designers is to institute simplicity where we now have complexity; to use fundamental theories being developed in this area to gain performance and ease-of-use benefits from simpler circuits; to understand the interplay between technological capabilities/limitations and sound architectural decisions. Computer arithmetic plays a key role in the computer designers' quest for user-friendliness, compactness, simplicity, high performance, low cost, and low power. Parhami's Computer Architecture emphasizes both the underlying theory and actual hardware designs. and links computer arithmetic to other subfields of computing. It is the first computer arithmetic book to cover all topics important for a balanced and complete view of the field. IT will be accompanied by an instructor's manual, with problem solutions and enlarged versions of the figures/charts, suitable for reproduction as transparencies. This is a textbook for senior/graduate level courses in departments of computer science and electrical & computer engineering. The course is commonly called Computer Arithmetic. Students wishing to enroll will usually have taken courses in computer organization and advanced digital design before enrolling. Computer Arithmetic is a sub-field of digital computer organization. It deals with the hardware realization of arithmetic functions to support various computer architectures, as well as arithmetic algorithms for firmware or software implementations. A major thrust of digital computer arithmetic is the design of hardware algorithms and circuits to enhance the speed of numeric operations. Thus much of what is presented in this book complements the architectural and algorithmic speedup techniques studied in the context of high performance computer architecture and parallel processing.

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