A copy that may have been read, minimal to no highlighting/underlining of text, no missing pages. May have a remainder mark. Spine may show signs of wear. Could be a library copy.

Seller Inventory # ABS-1176-1249

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Bibliographic Details

Title: Chip Multiprocessor Architecture: Techniques to Improve Throughput and Latency (Synthesis Lectures on Computer Architecture)
Publisher: Springer
Binding: paperback
Condition: Good

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Academic Book Solutions
70-6 Peconic Avenue, Medford, NY, 11763, U.S.A.

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