Applying a Composite Model to the IC Yield Problem [IREE Journal of Solid-State Circuits, Vol. sc-9, No. 3, June, 1974] [includes letters related to submission and interest]

Published by IREE Journal of Solid-State Circuits, 1974

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Seller: Crossroad Books, Eau Claire, WI, U.S.A.Crossroad Books

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Softcover

Condition: Used - Very good

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Item description from seller

This is a 10-page excerpt; an early reprint of pages 86-95 of the IREE Journal of Solid-State Circuits, Volume sc-9, Number 3. Clean. The pages are just a bit age-toned, but clean. Includes letters from the IEEE Journal of Solid-State Circuits, to the monograph author, one acknowledging the receipt of the manuscript for this monograph, and the 2nd indicating the acceptance of the monograph for publication (after suggested edits). Both letters have a paper-clip rust stain at the top edge, and one is stapled to the original envelope. Also includes ~30 letters from semiconductor industry figures to the author. Most from within the U. S., but also a couple from around the world. All on company letterheads. These letters requesting an advanced copy of the monograph, as announced in the Nov. 22, 1973 copy of Electronics Magazine. ; 27C; 11" x 8-1/2"; 10 pages.

Seller Inventory # 62364

Bibliographic details

Title
Applying a Composite Model to the IC Yield Problem [IREE Journal of Solid-State Circuits, Vol. sc-9, No. 3, June, 1974] [includes letters related to submission and interest]
Author
Warner, R. M. Jr.
Publisher
IREE Journal of Solid-State Circuits
Publication year
1974
Condition
Very Good
Dust jacket
No Dust Jacket
Binding
Self-wraps

Crossroad Books

Eau Claire, WI, U.S.A.

5-star seller

AbeBooks seller since August 22, 1998

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