Applications of Finite Element Methods for Reliability Studies on ULSI Interconnections provides a detailed description of the application of finite element methods (FEMs) to the study of ULSI interconnect reliability. Over the past two decades the application of FEMs has become widespread and continues to lead to a much better understanding of reliability physics.
To help readers cope with the increasing sophistication of FEMs’ applications to interconnect reliability, Applications of Finite Element Methods for Reliability Studies on ULSI Interconnections will:
- introduce the principle of FEMs;
- review numerical modeling of ULSI interconnect reliability;
- describe the physical mechanism of ULSI interconnect reliability encountered in the electronics industry; and
- discuss in detail the use of FEMs to understand and improve ULSI interconnect reliability from both the physical and practical perspective, incorporating the Monte Carlo method.
A full-scale review of the numerical modeling methodology used in the study of interconnect reliability highlights useful and noteworthy techniques that have been developed recently. Many illustrations are used throughout the book to improve the reader’s understanding of the methodology and its verification. Actual experimental results and micrographs on ULSI interconnects are also included.
Applications of Finite Element Methods for Reliability Studies on ULSI Interconnections is a good reference for researchers who are working on interconnect reliability modeling, as well as for those who want to know more about FEMs for reliability applications. It gives readers a thorough understanding of the applications of FEM to reliability modeling and an appreciation of the strengths and weaknesses of various numerical models for interconnect reliability.
Dr Tan is a member of the academic staff at the Nanyang Technological University, Singapore, and has been working on interconnect reliability for more than 10 years. He has published more than 150 technical papers in this area. His work includes the numerical modeling of interconnect reliability, reliability physics of interconnects, testing methodologies of interconnect reliability, failure analysis of interconnects, and statistical analysis of interconnect reliability data. He has trained several research staff in this area, including research fellows, research associates, PhD students and industrial engineers. He has had published a 173-page review article on electromigration in the Material Science and Engineering Review, and is the sole author of the book Electromigration in ULSI Interconnection, published by World Scientific. He is currently IEEE Distinguished Lecturer in the area of reliability, Fellow of Singapore Quality Institute, and Senior Member of ASQ and IEEE.
Dr. Li received his B.Eng and PhD from the School of Electrical and Electronic Engineering at Nanyang Technological University (NTU), Singapore, in 2005 and 2009 respectively. He was Process Integration Engineer in Systems on Silicon Manufacturing Co Pte Ltd (SSMC) from 2007 to 2009. He is one of the five recipients of the global inaugural prestige 2007 IEEE Electronic Device Society Master's Student Fellowship. In 2009, he joined the Singapore Institute of Manufacturing Technology (SIMTech), one of the research institutes in the Agency of Science, Technology and Research (A*STAR), as research scientist. His research interests include IC interconnection reliability and modeling, semiconductor device physics and reliability.
Dr Gan has extensive hands-on experience, beginning in 2001, in the application of the finite element method to reliability analysis. He has over 10 years of diverse technical and management experience in research and development of semiconductor reliability solutions and ideas on manufacturing. From 2001 to 2006, he was a research fellow with the School of Electrical and Electronic Engineering and School of Materials Science and Engineering, Nanyang Technological University, Singapore. In 2006, he joined Semiconductor Manufacturing International Corporation (SMIC), Shanghai, China, as a principal engineer in the Logic Technology Development Center. He is currently a reliability senior manager in the Technology R&D Center, managing a team responsible for process reliability improvement and evaluation (both FEOL and BEOL) for advanced technology nodes. Dr Gan has had more than 50 technical papers on finite element methods, ULSI interconnect reliability, and semiconductor reliability, published in refereed journals and international conferences, and 10 patents filed in China.
Dr Hou received his B.Eng and PhD from the School of Electrical and Electronic Engineering at Nanyang Technological University (NTU), Singapore, in 2005 and 2010 respectively. He has been working as a process integration engineer in Systems on Silicon Manufacturing Co Pte Ltd (SSMC) since 2009. His research interests are electromigration and stress induced voiding in IC interconnections.
