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Bibliographic Details

Title: ASIC AND FPGA VERIFICATION: A GUIDE TO ...

Publisher: Morgan Kaufmann

Publication Date: 2004

Binding: Hardcover

Condition: New

About this title

Synopsis:

Richard Munden demonstrates how to create and use simulation models for verifying ASIC and FPGA designs and board-level designs that use off-the-shelf digital components. Based on the VHDL/VITAL standard, these models include timing constraints and propagation delays that are required for accurate verification of today s digital designs. ASIC and FPGA Verification: A Guide to Component Modeling expertly illustrates how ASICs and FPGAs can be verified in the larger context of a board or a system. It is a valuable resource for any designer who simulates multi-chip digital designs.

About the Author:

By Richard Munden

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ASIC AND FPGA VERIFICATION: A GUIDE TO COMPONENT MODELING

MUNDEN RICHARD

New - Hardcover

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