Lock-Free C++ Mastery: Architecting Wait-Free Data Structures and Memory Models for Multi-Core CPUs. (High-Performance C++ Engineering) - Softcover

Book 4 of 11: High-Performance C++ Engineering

S. Lightner, Billie

 
9798195349868: Lock-Free C++ Mastery: Architecting Wait-Free Data Structures and Memory Models for Multi-Core CPUs. (High-Performance C++ Engineering)

Synopsis

Stop Pausing Your Threads. Master the Dark Arts of Lock-Free C++ and Achieve Extreme Multi-Core Scaling.

As core counts push past 64 and 128, legacy synchronization mechanisms are failing. Relying on std::mutex introduces catastrophic context switching, cache invalidation storms, and unpredictable latency spikes that can crash a high-frequency trading engine or throttle a game's framerate. Lock-Free C++ Mastery is the definitive engineering manual for breaking through the "Concurrency Wall" and building ultra-fast, wait-free architectures.

Moving far beyond basic multithreading, this book dives straight into the silicon. You will learn to bypass the OS scheduler entirely, manipulating the C++ memory model and hardware caches to build lock-free queues, wait-free ring buffers, and concurrent hash maps that scale linearly under massive contention.
Inside, you will discover:

  • Hardware Realities: Master the MESI protocol, defeat false sharing, and mitigate NUMA latency penalties to keep your execution paths blisteringly fast.
  • The C++ Memory Model: Stop guessing. Learn exactly when to use Sequential Consistency, Acquire-Release semantics, and the highly dangerous Relaxed memory ordering.
  • Safe Memory Reclamation (SMR): Solve the dreaded ABA problem and safely reclaim memory using Epoch-Based Reclamation (EBR), RCU, and C++26 Hazard Pointers.
  • Lock-Free Architectures: Step-by-step implementations for SPSC/MPMC Ring Buffers, Unbounded Michael-Scott Queues, Treiber Stacks, and Split-Ordered Hash Maps.
  • The Wait-Free Holy Grail: Design fast-path/slow-path fallbacks specifically engineered for hard real-time constraints and P99.99 latency benchmarking in trading engines.
  • Testing & Verification: Tame the state space explosion. Learn to flush out impossible-to-reproduce "Heisenbugs" using ThreadSanitizer (TSan) and formal Relacy model checking.
THE IMPLEMENTATION VAULT (Appendix)

Built for the performance architect in the trenches, the Appendix provides immediate, drop-in utility:
  • The C++ Memory Ordering Cheat Sheet: Your definitive map for navigating std::atomic barriers without sacrificing throughput.
  • The Universal CAS Loop Template: A battle-tested blueprint for Compare-And-Swap operations.
  • Troubleshooting the Top 10 Concurrency Heisenbugs: Direct solutions for the most devastating, silent failures in lock-free code.
Don't let OS locks throttle your hardware. Master lock-free execution and build the fastest, most scalable concurrent systems in your industry.

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