HW/SW Co-Design for Heterogeneous Multi-Core Platforms describes the results and outcome of the FP6 project which focuses on the development of an integrated tool chain targeting a heterogeneous multi core platform comprising of a general purpose processor (ARM or powerPC), a DSP (the diopsis) and an FPGA. The tool chain takes existing source code and proposes transformations and mappings such that legacy code can easily be ported to a modern, multi-core platform. Downloadable software will be provided for simulation purposes.
"synopsis" may belong to another edition of this title.
This book describes the results and outcome of the FP6 project, known as hArtes, which focuses on the development of an integrated tool chain targeting a heterogeneous multi core platform comprising of a general purpose processor (ARM or powerPC), a DSP (the diopsis) and an FPGA. The tool chain takes existing source code and proposes transformations and mappings such that legacy code can easily be ported to a modern, multi-core platform.
Benefits of the hArtes approach, described in this book, include:
"About this title" may belong to another edition of this title.
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