Synopsis
The most research on the power consumption of circuits has been concentrated on the switching power and the power dissipated by the leakage current has been the relatively minor area. However, in the current VLSI process, the sub-threshold current becomes one of the major factors of the power consumption, especially in high-end memory. To reduce the leakage power in the SRAM, the power gating method can be applied and a major technique of the power gating is using sleep transistors to control the sub-threshold current. In this project, dual threshold voltages are adopted; normal SRAM cells have lower threshold voltages and the higher threshold voltages control the sleep transistors. The size of sleep transistors can be chosen by the worst case current and are applied to every block.
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Design of Low Leakage SRAM
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LAP LAMBERT Academic Publishing Sep 2018, 2018
ISBN 10: 6139907861
ISBN 13: 9786139907861
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Taschenbuch. Condition: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -The most research on the power consumption of circuits has been concentrated on the switching power and the power dissipated by the leakage current has been the relatively minor area. However, in the current VLSI process, the sub-threshold current becomes one of the major factors of the power consumption, especially in high-end memory. To reduce the leakage power in the SRAM, the power gating method can be applied and a major technique of the power gating is using sleep transistors to control the sub-threshold current. In this project, dual threshold voltages are adopted; normal SRAM cells have lower threshold voltages and the higher threshold voltages control the sleep transistors. The size of sleep transistors can be chosen by the worst case current and are applied to every block. 56 pp. Englisch. Seller Inventory # 9786139907861
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Design of Low Leakage SRAM
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Design of Low Leakage SRAM
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Design of Low Leakage SRAM
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Condition: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Autor/Autorin: Tripathi Rajan PrasadMr.Rajan Prasad Tripathi works as an Assistant Professor in Department of Electronics and Communication Engineering, Amity School of Engineering and Technology. Mr. Rahul Kumar Verma works an Assistant Professor . Seller Inventory # 385876823
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Design of Low Leakage SRAM
Published by
LAP LAMBERT Academic Publishing Sep 2018, 2018
ISBN 10: 6139907861
ISBN 13: 9786139907861
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Taschenbuch. Condition: Neu. This item is printed on demand - Print on Demand Titel. Neuware -The most research on the power consumption of circuits has been concentrated on the switching power and the power dissipated by the leakage current has been the relatively minor area. However, in the current VLSI process, the sub-threshold current becomes one of the major factors of the power consumption, especially in high-end memory. To reduce the leakage power in the SRAM, the power gating method can be applied and a major technique of the power gating is using sleep transistors to control the sub-threshold current. In this project, dual threshold voltages are adopted; normal SRAM cells have lower threshold voltages and the higher threshold voltages control the sleep transistors. The size of sleep transistors can be chosen by the worst case current and are applied to every block.VDM Verlag, Dudweiler Landstraße 99, 66123 Saarbrücken 56 pp. Englisch. Seller Inventory # 9786139907861
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Design of Low Leakage SRAM
Published by
LAP LAMBERT Academic Publishing, 2018
ISBN 10: 6139907861
ISBN 13: 9786139907861
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Taschenbuch. Condition: Neu. nach der Bestellung gedruckt Neuware - Printed after ordering - The most research on the power consumption of circuits has been concentrated on the switching power and the power dissipated by the leakage current has been the relatively minor area. However, in the current VLSI process, the sub-threshold current becomes one of the major factors of the power consumption, especially in high-end memory. To reduce the leakage power in the SRAM, the power gating method can be applied and a major technique of the power gating is using sleep transistors to control the sub-threshold current. In this project, dual threshold voltages are adopted; normal SRAM cells have lower threshold voltages and the higher threshold voltages control the sleep transistors. The size of sleep transistors can be chosen by the worst case current and are applied to every block. Seller Inventory # 9786139907861
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Design of Low Leakage SRAM
Published by
LAP LAMBERT Academic Publishing, 2018
ISBN 10: 6139907861
ISBN 13: 9786139907861
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Taschenbuch. Condition: Neu. Design of Low Leakage SRAM | Rajan Prasad Tripathi (u. a.) | Taschenbuch | 56 S. | Englisch | 2018 | LAP LAMBERT Academic Publishing | EAN 9786139907861 | Verantwortliche Person für die EU: preigu GmbH & Co. KG, Lengericher Landstr. 19, 49078 Osnabrück, mail[at]preigu[dot]de | Anbieter: preigu. Seller Inventory # 114858421