Design Space Exploration of Network-on-Chip at System level: A Genetic Algorithm Approach - Softcover
Synopsis
About the Book: The goal of this text is to help students, researchers and academicians, who are working in the field of CAD for VLSI. Network-on-Chip(NoC) has been recently developed as an on-chip communication solution for System-on-Chip(SoC) design. This paradigm supports various communication resources at a time and overcomes the limitations of bus-based System. Design space exploration methodology at system level reduces the time-to-market pressure of the large and complex systems. On the other hand, design space exploration at system level is a combinatorial optimization problem. So, multi-objective Genetic Algorithm has been considered as an optimization tool for the design space exploration task. This book provides detailed methodology/algorithms to explore the design space of NoC at System Level using Genetic Algorithm. This book is the outcome of my PhD work. I hope this book will help all stake holders for extensive research in the field of NoC at System level.
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About the Author
Dr. Rabindra Kumar Jena is presently working as an Associate Professor (Information Technology) at Institute of Management Technology (IMT), Nagpur, India. He has degrees in M.Sc, M.Tech(CSE) and PhD from ABV-Indian Institute of Information Technology and Management, Gwalior, India. He has more than 13 years of experience in teaching and research.
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Design Space Exploration of Network-on-Chip at System level
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LAP LAMBERT Academic Publishing Jan 2012, 2012
ISBN 10: 384732005X
ISBN 13: 9783847320050
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Taschenbuch. Condition: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -About the Book: The goal of this text is to help students, researchers and academicians, who are working in the field of CAD for VLSI. Network-on-Chip(NoC) has been recently developed as an on-chip communication solution for System-on-Chip(SoC) design. This paradigm supports various communication resources at a time and overcomes the limitations of bus-based System. Design space exploration methodology at system level reduces the time-to-market pressure of the large and complex systems. On the other hand, design space exploration at system level is a combinatorial optimization problem. So, multi-objective Genetic Algorithm has been considered as an optimization tool for the design space exploration task. This book provides detailed methodology/algorithms to explore the design space of NoC at System Level using Genetic Algorithm. This book is the outcome of my PhD work. I hope this book will help all stake holders for extensive research in the field of NoC at System level. 160 pp. Englisch. Seller Inventory # 9783847320050
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Design Space Exploration of Network-on-Chip at System level
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ISBN 13: 9783847320050
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Condition: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Autor/Autorin: Jena Rabindra KumarDr. Rabindra Kumar Jena is presently working as an Associate Professor (Information Technology) at Institute of Management Technology (IMT), Nagpur, India. He has degrees in M.Sc, M.Tech(CSE) and PhD from ABV-Indi. Seller Inventory # 5509806
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Design Space Exploration of Network-on-Chip at System level
Published by
LAP LAMBERT Academic Publishing Jan 2012, 2012
ISBN 10: 384732005X
ISBN 13: 9783847320050
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Taschenbuch. Condition: Neu. This item is printed on demand - Print on Demand Titel. Neuware -About the Book: The goal of this text is to help students, researchers and academicians, who are working in the field of CAD for VLSI. Network-on-Chip(NoC) has been recently developed as an on-chip communication solution for System-on-Chip(SoC) design. This paradigm supports various communication resources at a time and overcomes the limitations of bus-based System. Design space exploration methodology at system level reduces the time-to-market pressure of the large and complex systems. On the other hand, design space exploration at system level is a combinatorial optimization problem. So, multi-objective Genetic Algorithm has been considered as an optimization tool for the design space exploration task. This book provides detailed methodology/algorithms to explore the design space of NoC at System Level using Genetic Algorithm. This book is the outcome of my PhD work. I hope this book will help all stake holders for extensive research in the field of NoC at System level.VDM Verlag, Dudweiler Landstraße 99, 66123 Saarbrücken 160 pp. Englisch. Seller Inventory # 9783847320050
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Design Space Exploration of Network-on-Chip at System level : A Genetic Algorithm Approach
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LAP LAMBERT Academic Publishing, 2012
ISBN 10: 384732005X
ISBN 13: 9783847320050
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Taschenbuch. Condition: Neu. nach der Bestellung gedruckt Neuware - Printed after ordering - About the Book: The goal of this text is to help students, researchers and academicians, who are working in the field of CAD for VLSI. Network-on-Chip(NoC) has been recently developed as an on-chip communication solution for System-on-Chip(SoC) design. This paradigm supports various communication resources at a time and overcomes the limitations of bus-based System. Design space exploration methodology at system level reduces the time-to-market pressure of the large and complex systems. On the other hand, design space exploration at system level is a combinatorial optimization problem. So, multi-objective Genetic Algorithm has been considered as an optimization tool for the design space exploration task. This book provides detailed methodology/algorithms to explore the design space of NoC at System Level using Genetic Algorithm. This book is the outcome of my PhD work. I hope this book will help all stake holders for extensive research in the field of NoC at System level. Seller Inventory # 9783847320050
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Design Space Exploration of Network-on-Chip at System level | A Genetic Algorithm Approach
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Taschenbuch. Condition: Neu. Design Space Exploration of Network-on-Chip at System level | A Genetic Algorithm Approach | Rabindra Kumar Jena | Taschenbuch | 160 S. | Englisch | 2012 | LAP LAMBERT Academic Publishing | EAN 9783847320050 | Verantwortliche Person für die EU: preigu GmbH & Co. KG, Lengericher Landstr. 19, 49078 Osnabrück, mail[at]preigu[dot]de | Anbieter: preigu. Seller Inventory # 106660134
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Design Space Exploration of Network-on-Chip at System level: A Genetic Algorithm Approach
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ISBN 10: 384732005X
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