The Design of a Microprocessor describes the design and realization of very complex logical structures within the framework of developing a 32 bit microprocessor chip set. The required engineering disciplines, especially logic design, circuit design, technology design, logic synthesis, tools design, and system design, as well as their interactions are covered in the text. Important features and new results treated include a RISC like implementation of a CISC processor; parallel accesses to the Translation-Lookaside Buffer, the cache and the cache directory; and implementation of error recovery for dynamic random access main memories. Included also is a combined approach of logic synthesis (silicon compilation) and design simulation, and a coverage of hierarchical physical design, neither of which have been discussed elsewhere at a comparable level of detail. Further topics include an effective approach to implement VLSI logic with a reduced and easily changeable book set; a new I/O driver design which helps to reduce machine cycle time; Level Sensitive Scan Design, which is being used in a growing number of designs; and a discussion of semiconductor failure mechanisms supported by several convincing photos.
"synopsis" may belong to another edition of this title.
The Design of a Microprocessor describes the design and realization of very complex logical structures within the framework of developing a 32 bit microprocessor chip set. The required engineering disciplines, especially logic design, circuit design, technology design, logic synthesis, tools design, and system design, as well as their interactions are covered in the text. Important features and new results treated include a RISC like implementation of a CISC processor; parallel accesses to the Translation-Lookaside Buffer, the cache and the cache directory; and implementation of error recovery for dynamic random access main memories. Included also is a combined approach of logic synthesis (silicon compilation) and design simulation, and a coverage of hierarchical physical design, neither of which have been discussed elsewhere at a comparable level of detail.
Further topics include an effective approach to implement VLSI logic with a reduced and easily changeable book set; a new I/O driver design which helps to reduce machine cycle time; Level Sensitive Scan Design, which is being used in a growing number of designs; and a discussion of semiconductor failure mechanisms supported by several convincing photos."About this title" may belong to another edition of this title.
Seller: Ammareal, Morangis, France
Hardcover. Condition: Très bon. Ancien livre de bibliothèque. Salissures sur la tranche. Edition 1989. Ammareal reverse jusqu'à 15% du prix net de cet article à des organisations caritatives. ENGLISH DESCRIPTION Book Condition: Used, Very good. Former library book. Stains on the edge. Edition 1989. Ammareal gives back up to 15% of this item's net price to charity organizations. Seller Inventory # E-615-248