Correct Hardware Design and Verification Methods: 12th IFIP WG 10.5 Advanced Research Working Conference, CHARME 2003, L'Aquila, Italy, October 21-24, ... (Lecture Notes in Computer Science, 2860) - Softcover
Synopsis
This volume contains the proceedings of CHARME 2003, the12th Advanced - search Working Conference on Correct Hardware Design and Veri?cation - thods. CHARME 2003 continues the series of working conferences devoted to the development and use of leading-edge formal techniques and tools for the design and veri?cation of hardware and hardware-like systems. Previous events in the 'CHARME' series were held in Edinburgh (2001), Bad Herrenalb (1999), Montreal (1997), Frankfurt (1995), Arles (1993) and - rin (1991). This series of meetings were organized in cooperation with IFIP WG 10.5and10.2.Priormeetings,stretchingbacktotheearliestdaysofformalha- wareveri?cationwereheldundervariousnamesinMiami(1990),Leuven(1989), Glasgow (1988), Grenoble (1986), Edinburgh (1985) and Darmstadt (1984). We now have a well-established convention whereby the European CHARME con- rence alternates with its biennial counterpart, the International Conference on Formal Methods in Computer-Aided Design(FMCAD),whichisheldinev- numbered years in the USA. CHARME 2003 took place during 21-24 October 2003 at the Computer Science Department of the University of L'Aquila, Italy. It was cosponsored by the IFIP TC10/WG10 Working Group on Design and Engineering of Electronic Systems. The CHARME 2003 scienti?c program was comprised of: - A morning Tutorial by Daniel Geist aimed at industrial and academic - terchange. - Two Invited Lectures by Wolfgang Roesner and Fabio Somenzi. - Regular Sessions, featuring 24 papers selected out of 65 submissions, r- ging from foundational contributions to tool presentations. - Short Presentations, featuring 8 short contributions accompanied by a short presentation. The conference, of course, also included informal tool demonstrations, not announced in the o?cial program.
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Synopsis
This book constitutes the refereed proceedings of the 12th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods, CHARME 2003, held in L'Aquila, Italy in October 2003.The 24 revised full papers and 8 short papers presented were carefully reviewed and selected from 65 submissions. The papers are organized in topical sections on software verification, automata based methods, processor verification, specification methods, theorem proving, bounded model checking, and model checking and applications.
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Correct Hardware Design and Verification Methods
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Taschenbuch. Condition: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -This volume contains the proceedings of CHARME 2003, the12th Advanced - search Working Conference on Correct Hardware Design and Veri cation - thods. CHARME 2003 continues the series of working conferences devoted to the development and use of leading-edge formal techniques and tools for the design and veri cation of hardware and hardware-like systems. Previous events in the CHARME series were held in Edinburgh (2001), Bad Herrenalb (1999), Montreal (1997), Frankfurt (1995), Arles (1993) and - rin (1991). This series of meetings were organized in cooperation with IFIP WG 10.5and10.2.Priormeetings,stretchingbacktotheearliestdaysofformalha- wareveri cationwereheldundervariousnamesinMiami(1990),Leuven(1989), Glasgow (1988), Grenoble (1986), Edinburgh (1985) and Darmstadt (1984). We now have a well-established convention whereby the European CHARME con- rence alternates with its biennial counterpart, the International Conference on Formal Methods in Computer-Aided Design(FMCAD),whichisheldinev- numbered years in the USA. CHARME 2003 took place during 21 24 October 2003 at the Computer Science Department of the University of L Aquila, Italy. It was cosponsored by the IFIP TC10/WG10 Working Group on Design and Engineering of Electronic Systems. The CHARME 2003 scienti c program was comprised of: A morning Tutorial by Daniel Geist aimed at industrial and academic - terchange. Two Invited Lectures by Wolfgang Roesner and Fabio Somenzi. Regular Sessions, featuring 24 papers selected out of 65 submissions, r- ging from foundational contributions to tool presentations. Short Presentations, featuring 8 short contributions accompanied by a short presentation. The conference, of course, also included informal tool demonstrations, not announced in the o cial program. 444 pp. Englisch. Seller Inventory # 9783540203636
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Correct Hardware Design and Verification Methods
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Kartoniert / Broschiert. Condition: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Invited Talks.- What Is beyond the RTL Horizon for Microprocessor and System Design?.- The Charme of Abstract Entities.- Tutorial.- The PSL/Sugar Specification Language A Language for all Seasons.- Software Verification.- Finding Regularity: Describing and . Seller Inventory # 4884601
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Correct Hardware Design and Verification Methods
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Taschenbuch. Condition: Neu. This item is printed on demand - Print on Demand Titel. Neuware -Invited Talks.- What Is beyond the RTL Horizon for Microprocessor and System Design .- The Charme of Abstract Entities.- Tutorial.- The PSL/Sugar Specification Language A Language for all Seasons.- Software Verification.- Finding Regularity: Describing and Analysing Circuits That Are Not Quite Regular.- Predicate Abstraction with Minimum Predicates.- Efficient Symbolic Model Checking of Software Using Partial Disjunctive Partitioning.- Processor Verification.- Instantiating Uninterpreted Functional Units and Memory System: Functional Verification of the VAMP.- A Hazards-Based Correctness Statement for Pipelined Circuits.- Analyzing the Intel Itanium Memory Ordering Rules Using Logic Programming and SAT.- Automata Based Methods.- On Complementing Nondeterministic Büchi Automata.- Coverage Metrics for Formal Verification.- 'More Deterministic' vs. 'Smaller' Büchi Automata for Efficient LTL Model Checking.- Short Papers 1.- An Optimized Symbolic Bounded Model Checking Engine.- Constrained Symbolic Simulation with Mathematica and ACL2.- Semi-formal Verification of Memory Systems by Symbolic Simulation.- CTL May Be Ambiguous When Model Checking Moore Machines.- Specification Methods.- Reasoning about GSTE Assertion Graphs.- Towards Diagrammability and Efficiency in Event Sequence Languages.- Executing the Formal Semantics of the Accellera Property Specification Language by Mechanised Theorem Proving.- Protocol Verification.- On Combining Symmetry Reduction and Symbolic Representation for Efficient Model Checking.- On the Correctness of an Intrusion-Tolerant Group Communication Protocol.- Exact and Efficient Verification of Parameterized Cache Coherence Protocols.- Short Papers 2.- Design and Implementation of an Abstract Interpreter for VHDL.- A ProgrammingLanguage Based Analysis of Operand Forwarding.- Integrating RAM and Disk Based Verification within the Mur Verifier.- Design and Verification of CoreConnectTM IP Using Esterel.- Theorem Proving.- Inductive Assertions and Operational Semantics.- A Compositional Theory of Refinement for Branching Time.- Linear and Nonlinear Arithmetic in ACL2.- Bounded Model Checking.- Efficient Distributed SAT and SAT-Based Distributed Bounded Model Checking.- Convergence Testing in Term-Level Bounded Model Checking.- The ROBDD Size of Simple CNF Formulas.- Model Checking and Application.- Efficient Hybrid Reachability Analysis for Asynchronous Concurrent Systems.- Finite Horizon Analysis of Markov Chains with the Mur Verifier.- Improved Symbolic Verification Using Partitioning Techniques.Springer-Verlag KG, Sachsenplatz 4-6, 1201 Wien 444 pp. Englisch. Seller Inventory # 9783540203636