Due to the aggressive scaling in the IC design, interconnect delay has adversely been affected, which subsequently reduces the performance. This problem can be mitigated by employing line drivers but they have high power consumption. Low-swing signalling techniques can provide high-speed signalling with low-power consumption, and most schemes are immune to noise as they have good signal-to-noise-ratio (SNR). However, they tend to have large area penalty and complexity as they require additional circuitry. A diode-connected driver circuit has the best attributes over other drivers in terms of low power, low delay, good SNR and low area-overhead. By incorporating a diode-connected configuration at the output, it can provide a high-speed signalling due to its high-driving capability. However, this configuration also has its limitations due to its inept adaptability to process variations, as well as leakage currents. To address these limitations, two novel driver schemes have been designed, where they have significant improvement in terms of delay, power consumption, noise and robustness against PVT effect and external disturbances such as crosstalk and single-event-upsets.
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Nor M. Muzlifah received B.Eng. degree in Electric-Telecommunication from Universiti Teknologi Malaysia, in 2005; M.Sc. degree in Electronics System Design Engineering from Universiti Sains Malaysia, in 2006; and a Ph.D. degree in Microelectronics System Design from Newcastle University, UK in 2011. She is currently an IEEE and IET member.
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Taschenbuch. Condition: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -Due to the aggressive scaling in the IC design, interconnect delay has adversely been affected, which subsequently reduces the performance. This problem can be mitigated by employing line drivers but they have high power consumption. Low-swing signalling techniques can provide high-speed signalling with low-power consumption, and most schemes are immune to noise as they have good signal-to-noise-ratio (SNR). However, they tend to have large area penalty and complexity as they require additional circuitry. A diode-connected driver circuit has the best attributes over other drivers in terms of low power, low delay, good SNR and low area-overhead. By incorporating a diode-connected configuration at the output, it can provide a high-speed signalling due to its high-driving capability. However, this configuration also has its limitations due to its inept adaptability to process variations, as well as leakage currents. To address these limitations, two novel driver schemes have been designed, where they have significant improvement in terms of delay, power consumption, noise and robustness against PVT effect and external disturbances such as crosstalk and single-event-upsets. 220 pp. Englisch. Seller Inventory # 9783330032460
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Condition: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Autor/Autorin: Mahyuddin Nor MuzlifahNor M. Muzlifah received B.Eng. degree in Electric-Telecommunication from Universiti Teknologi Malaysia, in 2005 M.Sc. degree in Electronics System Design Engineering from Universiti Sains Malaysia, in 2006 an. Seller Inventory # 158421925
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Taschenbuch. Condition: Neu. This item is printed on demand - Print on Demand Titel. Neuware -Due to the aggressive scaling in the IC design, interconnect delay has adversely been affected, which subsequently reduces the performance. This problem can be mitigated by employing line drivers but they have high power consumption. Low-swing signalling techniques can provide high-speed signalling with low-power consumption, and most schemes are immune to noise as they have good signal-to-noise-ratio (SNR). However, they tend to have large area penalty and complexity as they require additional circuitry. A diode-connected driver circuit has the best attributes over other drivers in terms of low power, low delay, good SNR and low area-overhead. By incorporating a diode-connected configuration at the output, it can provide a high-speed signalling due to its high-driving capability. However, this configuration also has its limitations due to its inept adaptability to process variations, as well as leakage currents. To address these limitations, two novel driver schemes have been designed, where they have significant improvement in terms of delay, power consumption, noise and robustness against PVT effect and external disturbances such as crosstalk and single-event-upsets.VDM Verlag, Dudweiler Landstraße 99, 66123 Saarbrücken 220 pp. Englisch. Seller Inventory # 9783330032460
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Taschenbuch. Condition: Neu. nach der Bestellung gedruckt Neuware - Printed after ordering - Due to the aggressive scaling in the IC design, interconnect delay has adversely been affected, which subsequently reduces the performance. This problem can be mitigated by employing line drivers but they have high power consumption. Low-swing signalling techniques can provide high-speed signalling with low-power consumption, and most schemes are immune to noise as they have good signal-to-noise-ratio (SNR). However, they tend to have large area penalty and complexity as they require additional circuitry. A diode-connected driver circuit has the best attributes over other drivers in terms of low power, low delay, good SNR and low area-overhead. By incorporating a diode-connected configuration at the output, it can provide a high-speed signalling due to its high-driving capability. However, this configuration also has its limitations due to its inept adaptability to process variations, as well as leakage currents. To address these limitations, two novel driver schemes have been designed, where they have significant improvement in terms of delay, power consumption, noise and robustness against PVT effect and external disturbances such as crosstalk and single-event-upsets. Seller Inventory # 9783330032460
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