Items related to Design-for-Test and Test Optimization Techniques for...

Design-for-Test and Test Optimization Techniques for TSV-based 3D Stacked ICs - Softcover

 
9783319023793: Design-for-Test and Test Optimization Techniques for TSV-based 3D Stacked ICs

This specific ISBN edition is currently not available.

Synopsis

Introduction.- Wafer Stacking and 3D Memory Test.- Built-in Self-Test for TSVs.- Pre-Bond TSV Test Through TSV Probing.- Pre-Bond TSV Test Through TSV Probing.- Overcoming the Timing Overhead of Test Architectures on Inter-Die Critical Paths.- Post-Bond Test Wrappers and Emerging Test Standards.- Test-Architecture Optimization and Test Scheduling.- Conclusions.

"synopsis" may belong to another edition of this title.

(No Available Copies)

Search Books:



Create a Want

Can't find the book you're looking for? We'll keep searching for you. If one of our booksellers adds it to AbeBooks, we'll let you know!

Create a Want

Other Popular Editions of the Same Title

9783319023779: Design-for-Test and Test Optimization Techniques for TSV-based 3D Stacked ICs

Featured Edition

ISBN 10:  3319023772 ISBN 13:  9783319023779
Publisher: Springer, 2013
Hardcover