This book is an in-depth exploration of RISC technology through a very significant family of high-performance computers: the POWER and PowerPC architectures and their implementations (POWER1, POWER2, and the PowerPC 601). Since their first use in IBM's successful RISC System/6000, these processors have provided an excellent demonstration of the interplay between architecture and implementation. Shlomo Weiss and Jim Smith use their experience as developers and instructors in high-performance computing to combine substantial explanation with discussion of the design choices and alternatives not chosen by the implementors. Weiss and Smith provide an illuminating example of how an instruction-set design can evolve to address the needs of different markets. They also show how the PowerPC derives from the POWER architecture to create the single-chip implementations that are now planned for widely varied commercial applications. POWER and PowerPC is intended for professionals seeking greater knowledge of second generation RISCs in general, as well as anyone exploring superscalar machines and the IBM RISC System/6000 or the PowerPC in particular. Valuable to software designers and analysts interested in performance optimization, this book brings to light the subtle hardware/software interactions that are central to the RISC paradigm.
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