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Synopsis
This book describes a specification, microarchitecture, VHDL implementation and evaluation of a SPARC v8 CPU with fine-grain multi-threading, called micro-threading. The CPU, named UTLEON3, is an alternative platform for exploring CPU multi-threading that is compatible with the industry-standard GRLIB package. The processor microarchitecture was designed to map in an efficient way the data-flow scheme on a classical von Neumann pipelined processing used in common processors, while retaining full binary compatibility with existing legacy programs.
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From the Back Cover
This book describes a specification, microarchitecture, VHDL implementation and evaluation of a SPARC v8 CPU with fine-grain multi-threading, called micro-threading. The CPU, named UTLEON3, is an alternative platform for exploring CPU multi-threading that is compatible with the industry-standard GRLIB package. The processor microarchitecture was designed to map in an efficient way the data-flow scheme on a classical von Neumann pipelined processing used in common processors, while retaining full binary compatibility with existing legacy programs.
- Describes and documents a working SPARC v8, with fine-grain multithreading and fast context switch;
- Provides VHDL sources for the described processor;
- Describes a latency-tolerant framework for coupling hardware accelerators to microthreaded processor pipelines;
- Includes programming by example in the micro-threaded assembly language.
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UTLEON3: Exploring Fine-Grain Multi-Threading in FPGAs
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Taschenbuch. Condition: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -This book describes a specification, microarchitecture, VHDL implementation and evaluation of a SPARC v8 CPU with fine-grain multi-threading, called micro-threading. The CPU, named UTLEON3, is an alternative platform for exploring CPU multi-threading that is compatible with the industry-standard GRLIB package. The processor microarchitecture was designed to map in an efficient way the data-flow scheme on a classical von Neumann pipelined processing used in common processors, while retaining full binary compatibility with existing legacy programs. 240 pp. Englisch. Seller Inventory # 9781489995704
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UTLEON3: Exploring Fine-Grain Multi-Threading in FPGAs
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Condition: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Describes and documents a working SPARC v8, with fine-grain multithreading and fast context switchProvides VHDL sources for the described processor Describes a latency-tolerant framework for coupling hardware accelerators to microthreaded processor pipe. Seller Inventory # 4213322
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Taschenbuch. Condition: Neu. nach der Bestellung gedruckt Neuware - Printed after ordering - This book describes a specification, microarchitecture, VHDL implementation and evaluation of a SPARC v8 CPU with fine-grain multi-threading, called micro-threading. The CPU, named UTLEON3, is an alternative platform for exploring CPU multi-threading that is compatible with the industry-standard GRLIB package. The processor microarchitecture was designed to map in an efficient way the data-flow scheme on a classical von Neumann pipelined processing used in common processors, while retaining full binary compatibility with existing legacy programs. Seller Inventory # 9781489995704
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Taschenbuch. Condition: Neu. UTLEON3: Exploring Fine-Grain Multi-Threading in FPGAs | Martin Dan¿k (u. a.) | Taschenbuch | xviii | Englisch | 2014 | Springer | EAN 9781489995704 | Verantwortliche Person für die EU: Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg, juergen[dot]hartmann[at]springer[dot]com | Anbieter: preigu. Seller Inventory # 105024043
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UTLEON3: Exploring Fine-Grain Multi-Threading in FPGAs
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Taschenbuch. Condition: Neu. This item is printed on demand - Print on Demand Titel. Neuware -This book describes a specification, microarchitecture, VHDL implementation and evaluation of a SPARC v8 CPU with fine-grain multi-threading, called micro-threading. The CPU, named UTLEON3, is an alternative platform for exploring CPU multi-threading that is compatible with the industry-standard GRLIB package. The processor microarchitecture was designed to map in an efficient way the data-flow scheme on a classical von Neumann pipelined processing used in common processors, while retaining full binary compatibility with existing legacy programs.Springer-Verlag KG, Sachsenplatz 4-6, 1201 Wien 240 pp. Englisch. Seller Inventory # 9781489995704