Foreword. Preface. 1. Introduction. 2. Defect Semantics and Yield Modeling. 3. Computational Models for Defect-Sensitivity. 4. Single Defect Multiple Layer. 5. Fault Analysis and Multiple Layer Critical Areas. 6. Single Defect Single Layer (SDSL) Model. 7. IC Yield Prediction and Single Layer Critical Areas. 8. Single vs. Multiple Layer Critical Areas. References. Appendix 1: Sources of Defect Mechanisms. Appendix 2: End Effects of Critical Regions. Appendix 3: NMOS Technology File. Index.
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