Verification of real-time requirements in systems-on-chip becomes more complex as more applications are integrated. Predictable and composable systems can manage the increasing complexity using formal verification and simulation. This book explains the concepts of predictability and composability and shows how to apply them to the design and analysis of a memory controller, which is a key component in any real-time system.
"synopsis" may belong to another edition of this title.
Verification of real-time requirements in systems-on-chip becomes more complex as more applications are integrated. Predictable and composable systems can manage the increasing complexity using formal verification and simulation. This book explains the concepts of predictability and composability and shows how to apply them to the design and analysis of a memory controller, which is a key component in any real-time system.
This book is generally intended for readers interested in Systems-on-Chips with
real-time applications. It is especially well-suited for readers looking to use SDRAM memories in systems with hard or firm real-time requirements. There is a strong focus on real-time concepts, such as predictability and composability, as well as a brief discussion about memory controller architectures for high-performance computing.
Readers will learn step-by-step how to go from an unpredictable SDRAM memory,
offering highly variable bandwidth and latency, to a predictable and composable
shared memory, providing guaranteed bandwidth and latency to isolated applications.
This journey covers concepts for making memories and arbiters behave in a
predictable and composable manner, as well as architecture descriptions of hardware
blocks that implement the concepts.
"About this title" may belong to another edition of this title.
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