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The gm/ID Methodology, a sizing tool for low-voltage analog CMOS Circuits: The semi-empirical and compact model approaches (Analog Circuits and Signal Processing) - Softcover
Synopsis
This book provides a comprehensive overview of design methodologies for Analog Circuits. It includes a MATLAB dedicated toolbox, and is the first book to present the gm/ID synthesis methodology. The book provides useful reference material.
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From the Back Cover
How to determine transistor sizes and currents when the supply voltages of analog CMOS circuits do not exceed 1.2V and transistors operate in weak, moderate or strong inversion? The gm/ID methodology offers a solution provided a reference transconductance over drain current ratio is available. The reference may be the result of measurements carried out on real physical transistors or advanced models. The reference may also take advantage of a compact model. In The gm/ID Methodology, a Sizing Tool for Low-Voltage Analog CMOS Circuits, we compare the semi-empirical to the compact model approach. Small numbers of parameters make the compact model attractive for the model paves the way towards analytic expressions unaffordable otherwise. The E.K.V model is a good candidate, but when it comes to short channel devices, compact models are either inaccurate or loose straightforwardness. Because sizing requires basically a reliable large signal representation of MOS transistors, we investigate the potential of the E.K.V model when its parameters are supposed to be bias dependent. The model-driven and semi-empirical methods are compared considering the Intrinsic Gain Stage and a few more complex circuits. A series of MATLAB files found on extras-springer.com allow redoing the tests.
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- PublisherSpringer
- Publication date2012
- ISBN 10 1461425050
- ISBN 13 9781461425052
- BindingPaperback
- LanguageEnglish
- Number of pages187
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The gm/ID Methodology, a sizing tool for low-voltage analog CMOS Circuits: The semi-empirical and compact model approaches
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