Synopsis
Programmable Logic Devices (PLDs) have become the key implementation medium for the vast majority of digital circuits designed today. While the highest-volume devices are still built with full-fabrication rather than field programmability, the trend towards ever fewer ASICs and more FPGAs is clear. This makes the field of PLD architecture ever more important, as there is stronger demand for faster, smaller, cheaper and lower-power programmable logic. PLDs are 90% routing and 10% logic. This book focuses on that 90% that is the programmable routing: the manner in which the programmable wires are connected and the circuit design of the programmable switches themselves. Anyone seeking to understand the design of an FPGA needs to become lit erate in the complexities of programmable routing architecture. This book builds on the state-of-the-art of programmable interconnect by providing new methods of investigating and measuring interconnect structures, as well as new programmable switch basic circuits. The early portion of this book provides an excellent survey of interconnec tion structures and circuits as they exist today. Lemieux and Lewis then provide a new way to design sparse crossbars as they are used in PLDs, and show that the method works with an empirical validation. This is one of a few routing architecture works that employ analytical methods to deal with the routing archi tecture design. The analysis permits interesting insights not typically possible with the standard empirical approach.
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Synopsis
This book presents the latest research results on the design of interconnect for programmable logic. The emphasis is on building the knowledge and tools for the automatic generation of interconnect structures. In this regard, the book presents design methodologies and applications for sparsely populated crossbars, clusters of lookup tables, switch blocks, and transistor-level routing switch design. It provides valuable information for both designers and architects about the area and delay implications of programmable interconnect. FPGA architects and System-on-Chip designers interested in exploring the integration of custom logic and programmable logic will find this work particularly useful.
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Design of Interconnection Networks for Programmable Logic
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Design of Interconnection Networks for Programmable Logic (Hardcover)
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Hardcover. Condition: new. Hardcover. The complexity of digital logic systems has increased steadily and rapidly for the last several decades due to a steady trend in technology scaling. As current manufacturing technology reaches the deep-submicron level, more and more low-level design effort is required to create a working design. This presents a growing cost and productivity problem for digital systems, which are also tending to increase in complexity at the systems level. At the same time, the capabilities of programmable logic devices have been advancing as they have progressed from PALs to CPLDs and now to FPGAs. Modern-day FPGAs can implement entire digital systems. They are increasingly attractive to systems-level designers, but in many cases their performance is inadequate, or they contain insufficient memory, or they lack key intellectual property cores. Hence, there is a growing demand for merging programmable logic technology with custom deep-submicron VLSI technology. If there is one particular aspect of programmable logic that is not well understood, that consumes the most area, or that is responsible for the most delay, it is the interconnect.This volume presents the latest research results on the design of interconnect for programmable logic. The emphasis is on building the knowledge and tools for the automatic generation of interconnect structures. In this regard, the book presents design methodologies and applications for sparsely populated crossbars, clusters of lookup tables, switch blocks, and transistor-level routing switch design. It provides valuable information for both designers and architects about the area and delay implications of programmable interconnect. FPGA architects and System-on-Chip designers interested in exploring the integration of custom logic and programmable logic should find this work particularly useful. Programmable Logic Devices (PLDs) have become the key implementation medium for the vast majority of digital circuits designed today. This book focuses on that 90% that is the programmable routing: the manner in which the programmable wires are connected and the circuit design of the programmable switches themselves. Shipping may be from multiple locations in the US or from the UK, depending on stock availability. Seller Inventory # 9781402077005
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Buch. Condition: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -Programmable Logic Devices (PLDs) have become the key implementation medium for the vast majority of digital circuits designed today. While the highest-volume devices are still built with full-fabrication rather than field programmability, the trend towards ever fewer ASICs and more FPGAs is clear. This makes the field of PLD architecture ever more important, as there is stronger demand for faster, smaller, cheaper and lower-power programmable logic. PLDs are 90% routing and 10% logic. This book focuses on that 90% that is the programmable routing: the manner in which the programmable wires are connected and the circuit design of the programmable switches themselves. Anyone seeking to understand the design of an FPGA needs to become lit erate in the complexities of programmable routing architecture. This book builds on the state-of-the-art of programmable interconnect by providing new methods of investigating and measuring interconnect structures, as well as new programmable switch basic circuits. The early portion of this book provides an excellent survey of interconnec tion structures and circuits as they exist today. Lemieux and Lewis then provide a new way to design sparse crossbars as they are used in PLDs, and show that the method works with an empirical validation. This is one of a few routing architecture works that employ analytical methods to deal with the routing archi tecture design. The analysis permits interesting insights not typically possible with the standard empirical approach. 232 pp. Englisch. Seller Inventory # 9781402077005
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