Synopsis
This book concentrates on common classes of hardware architectures and design problems, and focuses on the process of transitioning design requirements into synthesizable HDL code. Using his extensive, wide-ranging experience in computer architecture and hardware design, as well as in his training and consulting work, Ben provides numerous examples of real-life designs illustrated with VHDL and Verilog code. This code is shown in a way that makes it easy for the reader to gain a greater understanding of the languages and how they compare. All code presented in the book is included on the companion CD, along with other information, such as application notes.
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Real Chip Design and Verification Using Verilog and VHDL
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Paperback. Condition: Good. No Jacket. Former library book; Pages can have notes/highlighting. Spine may show signs of wear. ~ ThriftBooks: Read More, Spend Less. Seller Inventory # G0970539428I3N10
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Real Chip Design and Verification: Using Verilog and VHDL
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Paperback. Condition: Fair. THERE ARE NO TARIFFS OR CUSTOMS DUTIES ON BOOKS. Missing CD. Good condition, no marks inside. Seller Inventory # 440780
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Real Chip Design and Verification Using Verilog and VHDL
Seller: Harry Righton, Evesham, United Kingdom
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Soft cover. Condition: Very Good. 2002. includes CD. 394 pages. owners name to top corner of title page. Size: 4to - over 9¾ - 12" tall. Book. Seller Inventory # 910693