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Synopsis
The keynote speech on future trends in flash memories is followed by 16 additional review and research papers. Among the topics are built-in self-testing for detecting of coupling faults in semiconductor memories, a low-power current sensing scheme for CMOS SRAM, scanning capacitance microscopy analysis of DRAM trench capacitors, the thermal monitoring of memories, and a true testprocessor-per-pin algorithmic pattern generator. No subject index. Annotation c. by Book News, Inc., Portland, Or.
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Records of the 1996 IEEE International Workshop on Memory Technology, Design and Testing: August 13-14, 1996, Singapore
Seller: Bulrushed Books, Moscow, ID, U.S.A.
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Condition: Acceptable. SHIPS FAST. RESCUED + REPAIRED. Features a small coffee mishap, plus a reinforced binding, secured cover, and light annotations or highlighting-a durable, fully readable working copy brought back to life at a great value by our Book Sustainability Project. No access codes or CDs. Seller Inventory # #69A-00168