Manufacturing Yield Evaluation of VLSI/WSI Systems - Softcover

Softcover

ISBN 10: 0818662921 ISBN 13: 9780818662928

Publisher: IEEE Computer Society Press,U.S., 1995

Synopsis

Low manufacturing yield and dependability (reliability, availability, and performability) are problems of increasing importance as the densities of integrated circuits increase. This book furnishes you with engineering methodologies so that you can evaluate the cost-benefit ratio of fault-tolerant mechanisms used in VLSI/WSI systems. It focuses in particular on manufacturing fault analysis and yield evaluation. A practical understanding of these concepts and their application can help to reduce the chance of having device failures.
This book is divided into five chapters. The first chapter introduces and presents an overview of yield enhancement techniques, manufacturing defect and fault modeling, yield evaluation methodologies, and cost-benefit ratio evaluation methodologies of fault-tolerant mechanisms. Each of the other four chapters contains a collection of papers covering these four research areas. These chapters begin with an introduction to the papers, present abstracts, and provide further references for a complete study of the reprinted papers that follow.

About this title

Synopsis

Furnishes the engineering methodologies for evaluating the cost-benefit ratio of fault-tolerant systems used in VLSI/WSI systems, focusing in particular on manufacturing fault analysis and yield evaluation. Following an introduction and overview, the volume is divided into four chapters: techniques for yield enhancement, manufacturing defect and fa

Edition details

• Publisher: IEEE Computer Society Press,U.S.
• Publication date: 1995
• Language: English
• ISBN 10: 0818662921
• ISBN 13: 9780818662928
• Binding: Paperback
• Number of pages: 524
• Editor: Ciciani Bruno