This is a milestone in machine-assisted microprocessor verification. Gordon [20] and Hunt [32] led the way with their verifications of sim ple designs, Cohn [12, 13] followed this with the verification of parts of the VIPER microprocessor. This work illustrates how much these, and other, pioneers achieved in developing tractable models, scalable tools, and a robust methodology. A condensed review of previous re search, emphasising the behavioural model underlying this style of verification is followed by a careful, and remarkably readable, ac count of the SECD architecture, its formalisation, and a report on the organisation and execution of the automated correctness proof in HOL. This monograph reports on Graham's MSc project, demonstrat ing that - in the right hands - the tools and methodology for formal verification can (and therefore should?) now be applied by someone with little previous expertise in formal methods, to verify a non-trivial microprocessor in a limited timescale. This is not to belittle Graham's achievement; the production of this proof, work ing as Graham did from the previous literature, goes well beyond a typical MSc project. The achievement is that, with this exposition to hand, an engineer tackling the verification of similar microprocessor designs will have a clear view of the milestones that must be passed on the way, and of the methods to be applied to achieve them.
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"The SECD Microprocessor" is a substantial case study in hardware specification and verification. The subject is a silicon implementation of Landin's SECD machine, which is transformed into a layout, formally specified, and partially verified using the HOL proof assistant. It is important as a nontrivial worked example, clearly describing the organization and execution of the correctness of proof, and by making the sources available, will be helpful to those considering the use of or learning about the application of formal methods. The architecture is designed to provide support for functional progamming, with complex machine instruction semantics to support recursive definitions and function calls. This considerably raises the complexity of the state transitions to be verified, and an abstract data type and operations are introduced to express the specification. "The SECD Microprocessor" illustrates what formal methods can achieve today, not only by an expert, but by anyone prepared to carefully consider the problems at hand.
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Buch. Condition: Neu. Neuware - This is a milestone in machine-assisted microprocessor verification. Gordon [20] and Hunt [32] led the way with their verifications of sim ple designs, Cohn [12, 13] followed this with the verification of parts of the VIPER microprocessor. This work illustrates how much these, and other, pioneers achieved in developing tractable models, scalable tools, and a robust methodology. A condensed review of previous re search, emphasising the behavioural model underlying this style of verification is followed by a careful, and remarkably readable, ac count of the SECD architecture, its formalisation, and a report on the organisation and execution of the automated correctness proof in HOL. This monograph reports on Graham's MSc project, demonstrat ing that - in the right hands - the tools and methodology for formal verification can (and therefore should ) now be applied by someone with little previous expertise in formal methods, to verify a non-trivial microprocessor in a limited timescale. This is not to belittle Graham's achievement; the production of this proof, work ing as Graham did from the previous literature, goes well beyond a typical MSc project. The achievement is that, with this exposition to hand, an engineer tackling the verification of similar microprocessor designs will have a clear view of the milestones that must be passed on the way, and of the methods to be applied to achieve them. Seller Inventory # 9780792392453
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