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Synopsis
This book focusses on the spacer engineering aspects of novel MOS-based device–circuit co-design in sub-20nm technology node, its process complexity, variability, and reliability issues. It comprehensively explores the FinFET/tri-gate architectures with their circuit/SRAM suitability and tolerance to random statistical variations.
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About the Author
Sudeb Dasgupta, Brajesh Kumar Kaushik, Pankaj Kumar Pal
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Spacer Engineered FinFET Architectures: High-Performance Digital Circuit Applications
Published by
Taylor & Francis Ltd, 2020
ISBN 10: 0367573555
ISBN 13: 9780367573553
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Paperback / softback
Seller: THE SAINT BOOKSTORE, Southport, United Kingdom
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Paperback / softback. Condition: New. New copy - Usually dispatched within 4 working days. 453. Seller Inventory # B9780367573553
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Spacer Engineered FinFET Architectures: High-Performance Digital Circuit Applications
Seller: Majestic Books, Hounslow, United Kingdom
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Condition: New. pp. 154. Seller Inventory # 385822065
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Spacer Engineered FinFET Architectures: High-Performance Digital Circuit Applications
Seller: Biblios, Frankfurt am main, HESSE, Germany
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Condition: New. pp. 154. Seller Inventory # 18378049188
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Spacer Engineered FinFET Architectures: High-Performance Digital Circuit Applications
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Condition: New. pp. 154. Seller Inventory # 26378049198
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Spacer Engineered FinFET Architectures
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Spacer Engineered FinFET Architectures: High-Performance Digital Circuit Applications
Seller: Mispah books, Redhill, SURRE, United Kingdom
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paperback. Condition: New. New. book. Seller Inventory # ERICA82903675735556
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