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Recovery From Soft Errors in Triplicated Computer Systems Operating in Lock-Step (Classic Reprint) - Hardcover
Synopsis
Excerpt from Recovery From Soft Errors in Triplicated Computer Systems Operating in Lock-Step
Other interconnections of the hardware are needed to effect automatic resynchronization after an error has been detected. Command decoders are connected to each address bus in order to assert reset lines and enable input gates for reading the error detector. Parallel i/o ports connect the computers to each other for memory-to-memory transfer.
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