Hardcover

ISBN 10: 0138570876 ISBN 13: 9780138570873

Publisher: Prentice Hall PTR, 1997

The future of circuit and device design lies with Hardware Description Languages. This is an easy, hand-holding introduction to using HDLs for rapid design and prototyping. Learn all you need to know to start using HDLs in the digital design of circuits and devices. This book walks through all the basics, and presents extensive examples. All circuit/device designers who use, or are considering using, a Hardware Description Language (HDL).

From the Inside Flap:

Introduction

A New Paradigm for Hardware Design

In modern design practice, the process of digital design has recently taken a major departure from the processes of the recent past as well as from the distant past. Traditionally, digital design has been accomplished with the time-honored tools of block diagrams, wiring lists, Boolean equations, and schematic diagrams as the key elements. These time-honored methods have produced countless designs over the past half-century .

. . designs of immense complexity and sophistication. The designers who produced significant designs using the traditional tools have contributed to significant change in the digital technology world and in the world as a whole. As with all such accomplishments, correspondingly vital changes have accompanied these recent accomplishments. Digital designers have produced very-high-speed computing equipment which, in turn, has produced essential change in the science and art of digital design itself. These changes have helped produce a digital design world that is more productive and dynamic than at any time in the past. Until the present revolution, a relatively clear distinction existed between hardware and software. However, in more recent years, with the advent of programmable logic and the associated design tools, this distinction has begun to erode. In recent years, the traditional methods have given way to development processes involving hardware description languages (HDL)—the primary topic of this book.

The use of HDL involves the use of tools reminiscent of the tools commonly used in software development. These tools include text editors, compilers, debuggers, and simulators. This modern hardware design approach, based upon HDL, produces a design environment that encourages productivity and creativity and yet helps to produce fully tested, reliable digital products. Yet these same tools, as commonplace as they are in the software world, are creating significant changes in the hardware world.
The HDL approach incorporates a level of abstraction in the digital process that is essentially not present in traditional design methodologies. In the traditional approaches, the logical descriptions implicitly (or even explicitly) contain descriptions of the components of which the digital system is to be constructed. These implicit descriptions are contained in the schematic diagrams, wiring diagrams, and wiring lists that form the essential components of the design. By contrast, in the HDL approach, the designs are created in a lexical format that describes the essence of the design in some combination of a structural, functional, or behavioral form. The behavioral or functional design descriptions may be overlaid onto component descriptions after a compilation process on the lexical file representing the hardware design. However, the compiler output is prepared in the form of an interconnection list or “netlist” which readily lends itself to both an implementation process and a simulation process. Simulation is the recommended next step since debugging of complex logic is much more straightforward in a simulation environment.
After simulation, when functional performance has been verified, the logical description contained in the source file text description may be overlaid onto a hardware implementation. In the current text, the logical description will be implemented in a programmable logic array. Programmable arrays are prefabricated logical arrays within which electronic interconnections may be either enabled or disabled. The rapid and inexpensive enabling and disabling of data paths within the internal structure of available chips permits the logical designer to readily implement logical designs with a high level of sophistication. If desired, implementation of the logical design into a programmable hardware array may be accomplished literally within a matter of minutes.
While the logical design process and the implementation practice have both taken new turns in the recent past, the combination of new design methodology, such as text-based design utilizing an HDL, and new implementation methodology, such as programmable logic arrays, together have produced an entirely new era in which the traditional lines between hardware and software have been blurred. Hardware has traditionally been viewed as difficult and expensive to produce while it has also been viewed as even more difficult to modify. In a modern world, HDL is used to design and/or redesign hardware, and programmable logic chips are used for implementation. The corresponding conceptual notions including difficulties in design, implementation, and subsequent alteration are radically different in a modern environment than in the environment of even the recent past.
Software has been traditionally viewed as relatively simple to design and produce. Lexical-based design for software is the norm. Compilers and linkers readily produce object files and executable files from designer produced text files (source files). Software is viewed as relatively simple to design because text files may be easily edited, recompiled, and relinked. The resulting executable files are readily loaded into a computer as a final implementation step. However, now that hardware may be produced with tools comparable to the tools successfully used for software design and implementation, hardware may be viewed as substantially less costly and difficult to design and implement . . . and, in turn, substantially less difficult and costly to modify. As a collateral effect, much more sophisticated processing hardware can be produced economically and efficiently.
Impact of the New Hardware Paradigm

The ramifications of the elimination of many of the clear traditional hardware-software distinctions are probably many in number. Perhaps, as with any significant paradigm shift, the technologists of the world will spend a considerable length of time discovering the resulting impacts.
Traditional texts on logic design are replete with techniques on design methodology. Methodologies explored typically include Boolean-function simplification techniques, including Karnaugh mapping and Quine-McClusky tabular simplification methods. Traditional books also cover methods for the design of and implementation of counters, state machines, arithmetic units, and a complete array of the important logical building blocks. Necessarily, in traditional texts, designs of significant implementation detail are avoided in favor of designs stressing the methods the designer might employ in more complex designs. This perspective is perhaps, to some extent, motivated by the pure volume of documentation required to explore more pragmatic implementations. This emphasis on design methods continues to be important even with a significant paradigm shift in the digital-system design process. It is highly recommended that the designer acquire a substantial basis in the traditional design principles.
On the other hand, the traditional design methods are not the primary topics of the current text. The current text places an emphasis on the implementation of modern digital systems using HDL and programmable arrays. This approach affords more latitude in the presentation of implementation details because HDL provides a substantially more efficient and compact means of system representation. For example, as the reader progresses through the current text he or she might consider the traditional means of representing systems that are developed as illustrations in HDL. The traditional means including block diagrams and/or schematic diagrams are often far more cumbersome and ambiguous than the compact means consisting of source language files. As experienced designers are well aware, the devil is often in the details. The luxury of a more compact and explicit system representation permits a more detailed study of digital system implementation than would otherwise be reasonably possible. This more detailed level of study is also facilitated because the assumption is made here that the reader already has some familiarity with the traditional paradigms of logic design and implementation. In many ways, the reader may observe that the current text reads more like a classical software book than a hardware book. While this may initially feel awkward to the reader, it is the opinion of the author that this is the future of digital system design. Furthermore it is not difficult to adapt to the new paradigm and the motivation is quickly generated by the rapid pace at which the reader will soon acquire proficiency using the lexical approach.
The current book may well be utilized either as a text for classroom use, a means of casually becoming acquainted with HDL implementation, a tool for learning the details of HDL implementation, or as a reference to be used while implementing designs. Whatever the motivation of the reader, the excursion is sure to be interesting. Every attempt has been made to select complete illustrations. Each illustration has been successfully compiled and simulated. Illustrations have been selected to be large enough to provide sufficient design detail, but small enough to be fully understood and absorbed in a reasonably short length of time. Each illustration contains at least one simulation fragment providing additional insight—insight not only into the logical functionality involved but also into the implementation using programmable logic arrays.
With the increasing interest in HDL, many languages or language dialects are emerging and evolving. The approach taken in the current text is to concentrate on two of the available languages. The language occupying the central theme of the first chapters is the Altera hardware description language (AHDL) which is a straightforward, easy-to-learn, yet very powerful language. The language occupying the later chapters in the text is the very powerful and complex language called VHDL. VHDL is the language that is rapidly growing into an internationally recognized standard language for system representation. The approach of using the selected two languages is to permit the reader to learn in an effective and efficient manner. The student may rapidly progress through the early chapters while acquiring the formidable capabilities in the art of modern logic design. This approach is facilitated using AHDL. In the latter chapters, the student is exposed to VHDL which is a powerful and complex language. VHDL contains more modes and styles of design than does AHDL. Attending the additional power is a level of complexity that may be intimidating at times. Nevertheless, the power and utility of VHDL makes it an attractive candidate for design and standardization. The exploration of digital system design utilizing the combination of AHDL and VHDL provides an interesting and informative perspective into modern digital-system implementation.
It is my earnest desire to convey basic information concerning this new and exciting technology with a minimum of confusion and obfuscation. I have attempted not only to be clear and cogent in my writings, but also to be concise . . . perhaps too much so. My worst fear, is that I may not have succeeded in clarity and brevity. In the time it has taken to write this text, I have never viewed the manuscript without wanting to modify major portions.
Perhaps major revisions would yet be the best course of action, but for the current time, it is no longer possible. Please feel free to provide written comments concerning the text. All comments will be welcomed.
To avoid the problem of typing the included examples included in a text editor, Prentice Hall has made the source files available on the internet. The url for accessing the examples is:
phptr/scarpino. As available, new examples will be added to the site and examples may be modified due to feedback provided from readers. All of the examples in the text were compiled and simulated using the Altera Max+plus II software development system (version 6.2). This software was generously provided by Mr. Joe Hanson1 of Altera Corporation. Several version upgrades have evolved since the development of examples included here. The software system worked smoothly and responsively throughout the development. Altera has recently released an educational version of the software which is provided without charge for educational purposes only. The reader wanting to duplicate example results and work end-of-chapter problems will have to obtain the required software. My sincere good wishes are extended to readers pursuing this course of action. Stress the illustrations. See how they work. Find their limits and force them fail. Consider sharing your results.
Acknowledgments

I would like to express my sincere thanks to the Altera Corporation and particularly to Joe Hanson of Altera. They supplied the software on which all of the examples were designed and simulated. The software was straightforward to use and worked smoothly throughout the project. Altera also supplied the chips which were used to implement both the VHDL and the AHDL receivers as well as a significant number of the other examples. All of the EPLD implemented projects worked precisely as the simulations had performed. I would also like to thank Trina Zimmerman, Russ Hall, and Bernard Goodwin of Prentice Hall. Trina supplied the initial idea for the undertaking and Russ Hall and Bernard Goodwin made it happen. Trina has an exuberant personality. Some day I hope to meet Russ and Bernard. Pine Tree Composition, particularly Patty Donovan, provided brief periods of tranquillity during the final hectic days. Thank you.

Frank Scarpino