Previous books on this subject have concentrated just on the VHDL hardware description language without really teaching the design process. This new reference really shows how to design with VHDL in a synthesis context.
"synopsis" may belong to another edition of this title.
Intended to teach a synthesis-based approach to design using a hardware description language (ie. VHDL), this text focuses on the synthesis process in how to translate VHDL descriptions into gate level logic.
"About this title" may belong to another edition of this title.
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