3D IC Integration and Packaging (ELECTRONICS) - Hardcover

Lau, John H.

Hardcover

ISBN 10: 0071848061 ISBN 13: 9780071848060

Publisher: McGraw Hill, 2015

Synopsis

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A comprehensive guide to 3D IC integration and packaging technology
3D IC Integration and Packaging fully explains the latest microelectronics techniques for increasing chip density and maximizing performance while reducing power consumption. Based on a course developed by its author, this practical guide offers real-world problem-solving methods and teaches the trade-offs inherent in making system-level decisions. Explore key enabling technologies such as TSV, thin-wafer strength measurement and handling, microsolder bumping, redistribution layers, interposers, wafer-to-wafer bonding, chip-to-wafer bonding, 3D IC and MEMS, LED, and complementary metal-oxide semiconductor image sensors integration. Assembly, thermal management, and reliability are covered in complete detail.
3D IC Integration and Packaging covers:
· 3D integration for semiconductor IC packaging· Through-silicon vias modeling and testing· Stress sensors for thin-wafer handling and strength measurement· Package substrate technologies· Microbump fabrication, assembly, and reliability· 3D Si integration· 2.5D/3D IC integration· 3D IC integration with passive interposer· Thermal management of 2.5D/3D IC integration· Embedded 3D hybrid integration· 3D LED and IC integration· 3D MEMS and IC integration· 3D CMOS image sensors and IC integration· PoP, chip-to-chip interconnects, and embedded fan-out WLP

About this title

Product Description:

A comprehensive guide to 3D IC integration and packaging methods and solutions, featuring detailed examples and real-world applications Semiconductor manufacturers are continuously seeking new paths to design and fabricate ICs with increased density, higher bandwidth, and lower power. Many design teams are now looking to 3D IC integration as an enabling technology for the development of the next generation of semiconductors. Based on a popular course developed by its author, 3D IC Integration and Packaging is written so that you can quickly acquire problem-solving skills and understand the trade-offs inherent in making system-level decisions. Provides cutting-edge, timely information on all aspects of 3D IC integration and packaging Advanced topics include TSV, thin-wafer handling, thermal management, and solder microbumping Practical applications of 3D IC technology are covered in full detail Author has written 16 engineering books and published more than 350 peer-reviewed papers

About the Author:

John H. Lau received his Ph.D. degree in Theoretical and Applied Mechanics from the University of Illinois (1977), a M.A.Sc. degree in Structural Engineering from the University of British Columbia (1973), a second M.S. degree in Engineering Physics from the University of Wisconsin (1974), and a third M.S. degree in Management Science from Fairleigh Dickinson University (1981). He also has a B.E. degree in Civil Engineering from National Taiwan University (1970). John is an interconnection technology scientist at Agilent Technologies, Inc. His current interests cover a broad range of electronic and optoelectronic packaging and manufacturing technology. Prior to Agilent, he worked for Express Packaging Systems, Hewlett-Packard Company, Sandia National Laboratory, Bechtel Power Corporation, and Exxon Production and Research Company. With more than 30 years of R&D and manufacturing experience in the electronics, petroleum, nuclear, and defense industries, he has given over 200 workshops, authored and co-authored over 180 peer reviewed technical publications, and is the author and editor of 13 books: Solder Joint Reliability; Handbook of Tape Automated Bonding; Thermal Stress and Strain in Microelectronics Packaging; The Mechanics of Solder Alloy Interconnects; Handbook of Fine Pitch Surface Mount Technology; Chip On Board Technologies for Multichip Modules; Ball Grid Array Technology; Flip Chip Technologies; Solder Joint Reliability of BGA, CSP, Flip Chip, and Fine Pitch SMT Assemblies; Electronics Packaging: Design, Materials, Process, and Reliability; Chip Scale Package (CSP): Design, Materials, Process, Reliability, and Applications; Low Cost Flip Chip Technologies for DCA, WLCSP, and PBGA Assemblies, and Microvias for Low Cost, High Density Interconnects. John served as one of the associate editors of the IEEE Transactions on Components, Packaging, and Manufacturing Technology and ASME Transactions, Journal of Electronic Packaging. He also served as general chairman, program chairman, and session chairman, and invited speaker of several IEEE, ASME, ASM, MRS, IMAPS, SEMI, and SMI International conferences. He received a few awards from ASME and IEEE for best papers and outstanding technical achievements, and is an ASME Fellow and an IEEE Fellow. He is listed in American Men and Women of Science and Whos Who in America.

About this edition

• Publisher: McGraw Hill
• Publication date: 2015
• ISBN 10: 0071848061
• ISBN 13: 9780071848060
• Binding: Hardcover
• Number of pages: 480