About the Author:
Subramanian S. Iyer obtained his B.Tech. in Electrical Engineering at the Indian Institute of Technology, Bombay in 1977, and his M.S. and Ph.D. in Electrical Engineering at the University of California at Los Angeles in 1978 and 1981 respectively. He joined the IBM T.J. Watson Research Center in 1981 and was manager of the Exploratory Structures and Devices Group till 1994, when he founded SiBond L.L.C. to develop and make silicon-on-insulator materials. Since 1997 he has been with the IBM Microelectronics Division, Semiconductor Research and Development Center, where currently he manages the embedded DRAM project. Dr. Iyer has received two outstanding technical achievement awards at IBM for the development of the titanium salicide process and the fabrication of the first SiGe heterojunction bipolar transistor. He has received 15 Invention Achievement Awards and has authored over 150 articles in technical journals and several book chapters. Dr. Iyer is an Adjunct Professor of Electrical Engineering at Columbia University, New York, and a Fellow of the IEEE. Andre J. Auberton-Herve is President Corporate and Chairman of the Board of SOITEC, which is devoted to SOI wafer production. He founded this company with J.M. Lamure in 1992. He holds a Ph.D. in Semiconductor Physics and an M.S. in Materials Science from Ecole Centrale de Lyon. In the 1980s he managed a joint development program between LETI and THOMSON-CSF, the ultimate target of which was the technological transfer from R&D to production of 1.2 m and 0.8 m SOI CMOS for space applications. He was also in charge of several European projects which applied SOI to 3D integration, VLSI and ULSI. In 1999, he received the European SEMI Award in recognition of his work on the Smart Cut (R) technology and his contribution to the semiconductor industry. He is a member of the Electrochemical Society and the IEEE.
Synopsis:
The use of silicon-on-insulator (SOI) technology in microelectronics is proliferating and is ready to be applied in a growing number of IC fabrication situations. Bonding of single crystal Si to dielectrics, normally silicon dioxide, is a key method of producing SOI structures and this work is designed to assist engineers directly in applying emerging SOI technology in practice. Wafer bonding principles, grind and polish back, Smartcut, Eltran and wafer characterization are all explained and illustrated for the benefit of the process development engineer.
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