Language: English
Published by Penguin Books/Pelican, 1954
Seller: Frans Books, Solva, Pembs, United Kingdom
Hardcover. Condition: Good. No Jacket. Fish-Hawk; W B Alexander (illustrator). Pelican A 175. New revised edition. Good black hard covers, text on spine very faded. Mark left by reinforcing tape on inside hinges. Up-to -date information on European birds in a realatively small space. 88 illustrations by Fish-hawk, 77 maps compiled by W B Alexander, 77 charts compiled by author. A very usable copy (B71).
Language: English
Published by Pelican Books, London, 1951
Seller: J J Basset Books, bassettbooks, bookfarm.co.uk, Peter Tavy, United Kingdom
Paperback. Condition: GOOD (BELOW AVERAGE). No Jacket. Numerous Black & White Drawings & Pictures By Fish-hawk,W.B.Alexander and Author. (illustrator). This is a First Edition. FEEL FREE TO E-MAIL FOR PHOTOGRAPHS AND FURTHER DETAILS. FROM A DEALER WHO TELLS YOU WHO THEY ARE AND WHAT THEIR TELEPHONE AND ADDRESS CONTACT DETAILS ARE! "The second volume in this series describing the appearance, life and habits of the birds of prey and waterfowl, with many maps and charts and over eighty illustrations by 'Fish-Hawk'. This book has got some water stain markings throughout and on front outer cover.! Pelican book number A176 Size: Mass Market Paperback. Not Inscribed or Signed.
Published by Pelican Books, Penguin Books Ltd., Melbourne, London, Baltimore, 1954
Seller: Ryde Bookshop Ltd, Isle of Wight, United Kingdom
Soft cover. Condition: Fair. wity 88 illustrations by Fish-Hawk, 77 maps, mainly compiled by W.B. Alexander and 75 charts compiled by James Fisher (illustrator). Revised Edition. Tears, creases and dust spotting on cover and spine. Foxing on the end papers. Creases on base corners of the first few pages.
Published by Penguin Books Ltd., Pelican Books, Harmondsworth, Middlesex, England, 1954
Seller: Ryde Bookshop Ltd, Isle of Wight, United Kingdom
Soft cover. Condition: Very Good. With 88 illustrations by Fish-Hawk, 77 maps mainly compiled by W.B. Alexander, and 75 charts compiled by the writer (illustrator). Revised Edition.
Condition: New.
Seller: Ria Christie Collections, Uxbridge, United Kingdom
£ 59.30
Quantity: Over 20 available
Add to basketCondition: New. In.
Condition: New. 1st ed. 2021 edition NO-PA16APR2015-KAP.
Seller: GreatBookPrices, Columbia, MD, U.S.A.
Condition: New.
Condition: New.
Seller: Lucky's Textbooks, Dallas, TX, U.S.A.
Condition: New.
Seller: Ria Christie Collections, Uxbridge, United Kingdom
£ 79.30
Quantity: Over 20 available
Add to basketCondition: New. In.
Seller: GreatBookPrices, Columbia, MD, U.S.A.
Condition: As New. Unread book in perfect condition.
Seller: GreatBookPricesUK, Woodford Green, United Kingdom
Condition: New.
Seller: Lucky's Textbooks, Dallas, TX, U.S.A.
Condition: New.
Condition: New.
Condition: New.
Seller: California Books, Miami, FL, U.S.A.
Condition: New.
Seller: Ria Christie Collections, Uxbridge, United Kingdom
£ 94.30
Quantity: Over 20 available
Add to basketCondition: New. In.
Seller: GreatBookPricesUK, Woodford Green, United Kingdom
Condition: As New. Unread book in perfect condition.
Language: English
Published by Springer International Publishing, 2021
ISBN 10: 3030407888 ISBN 13: 9783030407889
Seller: AHA-BUCH GmbH, Einbeck, Germany
Taschenbuch. Condition: Neu. Druck auf Anfrage Neuware - Printed after ordering - This book presents Dual Mode Logic (DML), a new design paradigm for digital integrated circuits. DML logic gates can operate in two modes, each optimized for a different metric. Its on-the-fly switching between these operational modes at the gate, block and system levels provide maximal E-D optimization flexibility. Each highly detailed chapter has multiple illustrations showing how the DML paradigm seamlessly implements digital circuits that dissipate less energy while simultaneously improving performance and reducing area without a significant compromise in reliability. All the facets of the DML methodology are covered, starting from basic concepts, through single gate optimization, general module optimization, design trade-offs and new ways DML can be integrated into standard design flows using standard EDA tools. DML logic is compatible with numerous applications but is particularly advantageous for ultra-low power, reliable high performance systems, and advanced scaled technologies Written in language accessible to students and design engineers, each topic is oriented toward immediate application by all those interested in an alternative to CMOS logic.Describes a novel, promising alternative to conventional CMOS logic, known as Dual Mode Logic (DML), with which a single gate can be operated selectively in two modes, each optimized for a different metric (e.g., energy consumption, performance, size);Demonstrates several techniques at the architectural level, which can result in high energy savings and improved system performance;Focuses on the tradeoffs between power, area and speed including optimizations at the transistor and gate level, including alternatives to DML basic cells;Illustrates DML efficiency for a variety of VLSI applications.
Seller: Books Puddle, New York, NY, U.S.A.
Condition: New.
Seller: Ria Christie Collections, Uxbridge, United Kingdom
£ 104.30
Quantity: Over 20 available
Add to basketCondition: New. In.
Seller: Revaluation Books, Exeter, United Kingdom
Hardcover. Condition: Brand New. 199 pages. 9.25x6.10x0.50 inches. In Stock.
Language: English
Published by Springer International Publishing, 2020
ISBN 10: 3030407853 ISBN 13: 9783030407858
Seller: AHA-BUCH GmbH, Einbeck, Germany
Buch. Condition: Neu. Druck auf Anfrage Neuware - Printed after ordering - This book presents Dual Mode Logic (DML), a new design paradigm for digital integrated circuits. DML logic gates can operate in two modes, each optimized for a different metric. Its on-the-fly switching between these operational modes at the gate, block and system levels provide maximal E-D optimization flexibility. Each highly detailed chapter has multiple illustrations showing how the DML paradigm seamlessly implements digital circuits that dissipate less energy while simultaneously improving performance and reducing area without a significant compromise in reliability. All the facets of the DML methodology are covered, starting from basic concepts, through single gate optimization, general module optimization, design trade-offs and new ways DML can be integrated into standard design flows using standard EDA tools. DML logic is compatible with numerous applications but is particularly advantageous for ultra-low power, reliable high performance systems, and advanced scaled technologies Written in language accessible to students and design engineers, each topic is oriented toward immediate application by all those interested in an alternative to CMOS logic.Describes a novel, promising alternative to conventional CMOS logic, known as Dual Mode Logic (DML), with which a single gate can be operated selectively in two modes, each optimized for a different metric (e.g., energy consumption, performance, size);Demonstrates several techniques at the architectural level, which can result in high energy savings and improved system performance;Focuses on the tradeoffs between power, area and speed including optimizations at the transistor and gate level, including alternatives to DML basic cells;Illustrates DML efficiency for a variety of VLSI applications.
Language: English
Published by Springer International Publishing AG, CH, 2017
ISBN 10: 3319604015 ISBN 13: 9783319604015
Seller: Rarewaves.com USA, London, LONDO, United Kingdom
£ 138.28
Quantity: Over 20 available
Add to basketHardback. Condition: New. 1st ed. 2018. This book pioneers the field of gain-cell embedded DRAM (GC-eDRAM) design for low-power VLSI systems-on-chip (SoCs). Novel GC-eDRAMs are specifically designed and optimized for a range of low-power VLSI SoCs, ranging from ultra-low power to power-aware high-performance applications. After a detailed review of prior-art GC-eDRAMs, an analytical retention time distribution model is introduced and validated by silicon measurements, which is key for low-power GC-eDRAM design. The book then investigates supply voltage scaling and near-threshold voltage (NTV) operation of a conventional gain cell (GC), before presenting novel GC circuit and assist techniques for NTV operation, including a 3-transistor full transmission-gate write port, reverse body biasing (RBB), and a replica technique for optimum refresh timing. Next, conventional GC bitcells are evaluated under aggressive technology and voltage scaling (down to the subthreshold domain), before novel bitcells for aggressively scaled CMOS nodes and soft-error tolerance as presented, including a 4-transistor GC with partial internal feedback and a 4-transistor GC with built-in redundancy.
Seller: Books Puddle, New York, NY, U.S.A.
Condition: New. pp. 146.
Seller: Mispah books, Redhill, SURRE, United Kingdom
Hardcover. Condition: New. New. book.
Language: English
Published by Springer International Publishing AG, CH, 2017
ISBN 10: 3319604015 ISBN 13: 9783319604015
Seller: Rarewaves.com UK, London, United Kingdom
£ 126.12
Quantity: Over 20 available
Add to basketHardback. Condition: New. 1st ed. 2018. This book pioneers the field of gain-cell embedded DRAM (GC-eDRAM) design for low-power VLSI systems-on-chip (SoCs). Novel GC-eDRAMs are specifically designed and optimized for a range of low-power VLSI SoCs, ranging from ultra-low power to power-aware high-performance applications. After a detailed review of prior-art GC-eDRAMs, an analytical retention time distribution model is introduced and validated by silicon measurements, which is key for low-power GC-eDRAM design. The book then investigates supply voltage scaling and near-threshold voltage (NTV) operation of a conventional gain cell (GC), before presenting novel GC circuit and assist techniques for NTV operation, including a 3-transistor full transmission-gate write port, reverse body biasing (RBB), and a replica technique for optimum refresh timing. Next, conventional GC bitcells are evaluated under aggressive technology and voltage scaling (down to the subthreshold domain), before novel bitcells for aggressively scaled CMOS nodes and soft-error tolerance as presented, including a 4-transistor GC with partial internal feedback and a 4-transistor GC with built-in redundancy.
Published by London: Osgood, McIlvaine & Co., / New York, NY: Harper & Brothers, 1897
Seller: Benedict Wilson Books, Folkestone, KENT, United Kingdom
Magazine / Periodical First Edition
FIRST EDITIONS. Two volumes, octavo (25 x 17cm), pp.24; 173-332, pp.20; 333-494; 21-24. Publisher's card wraps, British issues. Some light wear and marks to covers. Fine. Containing two parts of George du Maurier's new story The Martian.
Publication Date: 2025
Seller: True World of Books, Delhi, India
LeatherBound. Condition: New. BOOKS ARE EXEMPT FROM IMPORT DUTIES AND TARIFFS; NO EXTRA CHARGES APPLY. LeatherBound edition. Condition: New. Reprinted from 1950 edition. Leather Binding on Spine and Corners with Golden leaf printing on spine. Bound in genuine leather with Satin ribbon page markers and Spine with raised gilt bands. A perfect gift for your loved ones. Pages: 16 NO changes have been made to the original text. This is NOT a retyped or an ocr'd reprint. Illustrations, Index, if any, are included in black and white. Each page is checked manually before printing. As this print on demand book is reprinted from a very old book, there could be some missing or flawed pages, but we always try to make the book as complete as possible. Fold-outs, if any, are not part of the book. If the original book was published in multiple volumes then this reprint is of only one volume, not the whole set. Sewing binding for longer life, where the book block is actually sewn (smythe sewn/section sewn) with thread before binding which results in a more durable type of binding. Pages: 16 Volume no.324.