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Chakrabarty Krishnendu Iyengar (7 results)
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Infrastructure Design for Sensor Networks : Scalable Infrastructure for Information Processing in Distributed Sensor Networks.
Published by Goldaming : Springer London, 2005
Language: English
Seller: Antiquariat Thomas Haker GmbH & Co. KG, Berlin, Germany
Association Member: GIAQ
Seller rating 5 out of 5 stars
First Edition
Hardcover. Condition: Wie neu. 1. Ed. 250 p. Like new. Shrink wrapped. / Wie neu. In Folie verschweißt. Sprache: Englisch Gewicht in Gramm: 490.
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Condition: New.
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Condition: As New. Unread book in perfect condition.
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Test Resource Partitioning for System-On-A-Chip
Seller: GreatBookPricesUK, Woodford Green, United Kingdom
Seller rating 5 out of 5 stars
Condition: New.
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Test Resource Partitioning for System-On-A-Chip
Seller: GreatBookPricesUK, Woodford Green, United Kingdom
Seller rating 5 out of 5 stars
Condition: As New. Unread book in perfect condition.
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Test Resource Partitioning for System-on-a-chip
Published by Kluwer Academic Publishers, 2002
ISBN 10: 1402071191 ISBN 13: 9781402071195
Language: English
Seller: Kennys Bookshop and Art Galleries Ltd., Galway, GY, Ireland
Seller rating 5 out of 5 stars
Condition: New. Talks about test resource partitioning and optimization techniques for plug-and-play system-on-a-chip (SOC) test automation. This book aims to position test resource partitioning in the context of SOC test automation. It presents various techniques for the partitioning and optimization of the three major SOC test resources. Series: Frontiers in Electronic Testing. Num Pages: 244 pages, biography. BIC Classification: TJFD; UY. Category: (P) Professional & Vocational; (UP) Postgraduate, Research & Scholarly. Dimension: 234 x 156 x 15. Weight in Grams: 1170. . 2002. Hardback. . . . .
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Test Resource Partitioning for System-on-a-chip
Published by Kluwer Academic Publishers, 2002
ISBN 10: 1402071191 ISBN 13: 9781402071195
Language: English
Condition: New. Talks about test resource partitioning and optimization techniques for plug-and-play system-on-a-chip (SOC) test automation. This book aims to position test resource partitioning in the context of SOC test automation. It presents various techniques for the partitioning and optimization of the three major SOC test resources. Series: Frontiers in Electronic Testing. Num Pages: 244 pages, biography. BIC Classification: TJFD; UY. Category: (P) Professional & Vocational; (UP) Postgraduate, Research & Scholarly. Dimension: 234 x 156 x 15. Weight in Grams: 1170. . 2002. Hardback. . . . . Books ship from the US and Ireland.
