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Chip design CMOS analog integrated circuit layout design and verification: based on Cadence IC 6.1.7 version 2(Chinese Edition)
ISBN 10: 7111737806 ISBN 13: 9787111737803
£ 135.70
Convert currency£ 11.07 shipping from China to United KingdomQuantity: 3 available
Add to basketpaperback. Condition: New. Language:Chinese.Paperback. Pub Date: 2023-12 Pages: 483 Publisher: Machinery Industry Press This book focuses on the field of CMOS analog integrated circuit layout design. Starting from the basic concepts of layout. design methods and EDA tools. it gradually introduces CMOS analog integrated circuit layout planning. . layout. design to tape-out; it introduces in detail the current mainstream analog integrated circuit layout design and verification tools - Cadence IC 6.1.7 and Siemens EDA Cal.
