Introduction.- Analog IC Design.- The Analog IC Design Automation Flow.- Analog IC Layout Automation.- Conclusions.- References.- State of the Art on Analog Layout Automation.- Placement.- Layout Constraints.- Chip Floorplan Representations.- Approaches.- Layout Generation Tools.- Closing the Gap between Electrical and Physical Design.- Layout-Aware Sizing Approaches.- Commercial Tools.- Automatic Layout Generation.- Design Flow based on Automatic Generation.- Sizing Task.- Layout Generation Design Flow.- Tool Architecture.- Graphical User Interface.- Technology Design Kit.- Hierarchical High Level Cell Description.- Placer.- Placer Architecture.- Template.- Template-based Generation Procedure.- Instantiation.- Pre-processing.- Biasing.- Abutment.- Post-processing.- Minimum Distances.- Guard Ring.- Router.- Router Architecture.- Template.- Optimization-based Generation Procedure.- Multiple Contacts.- Evolutionary Algorithm.- Chromosome.- Initialization.- Genetic Operator: Crossover.- Genetic Operator: Mutation.- Optimization Phases.- Internal Evaluation Procedure.- Short Circuit Checker.- Design Rule Checker.- Electrical Rule Checker.- Results.- Case Study I - Fully-Dynamic Comparator.- Template.- Layout Generation.- Placer.- Router.- Validation.- Case Study II - Single-Ended Folded Cascode Amplifier.- Template Hierarchy.- Layout Generation.- Retargeting for Different Sizes.- Retargeting for Different Technology.- Conclusions and Future Work.- References.
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