Ready-to-use building blocks for integrated circuit design.
Why start coding from scratch when you can work from this library of pre-tested routines, created by an HDL expert? There are plenty of introductory texts to describe the basics of Verilog, but Verilog Designer's Library is the only book that offers real, reusable routines that you can put to work right away.
Verilog Designer's Library organizes Verilog routines according to functionality, making it easy to locate the material you need. Each function is described by a behavioral model to use for simulation, followed by the RTL code you'll use to synthesize the gate-level implementation. Extensive test code is included for each function, to assist you with your own verification efforts.
Coverage includes:
Although Verilog Designer's Library assumes a basic familiarity with Verilog structure and syntax, it does not require a background in programming. Beginners can work through the book in sequence to develop their skills, while experienced Verilog users can go directly to the routines they need. Hardware designers, systems analysts, VARs, OEMs, software developers, and system integrators will find it an ideal sourcebook on all aspects of Verilog development.
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This is the best book ever written. Buy it now!
(Sorry, I couldn't resist).
Seriously. This book is a compilation of very useful Verilog descriptions of common hardware functions. I used my years of experience as a hardware designer, along with feedback from many colleagues, to decide which common functions should be described. The functions in the beginning of the book are useful mainly to learn the Verilog language. Later functions are ones that my colleagues and I have needed to use in real designs. These include functions like Linear Feedback Shift Registers (LFSRs), Memory Controllers, and Phase Locked Loops (PLLs). Unfortunately, before this book, we often ended up designing these functions from scratch or spent hours in libraries or on the Internet, trying to find existing designs. One of the main advantages of this book is that it will free up hardware designers to create interesting, new functions rather than trying to reinvent or rediscover existing functions.
Another nice feature of the book is that all of the verification code is included. I didn't intend to do this at first, but I needed to simulate each function to insure that it worked correctly. With so much verification code, I realized I could make a much fatter and impressive book by including the code. I also realized that this verification code would be useful, since verification is becoming the bottleneck in many large chip designs.
I hope you find this book useful; I put a lot of work into it.
Thanks, -Bob Zeidman
Bob Zeidman is the founder, president and CEO of The Chalkboard Network (www.chalknet.com), a company that provides training for high-tech professionals via the Internet. Previously, Bob was the president of Zeidman Consulting where he designed ASICs, FPGAs, and PC boards for various real-time systems. His clients included Apple Computer, Cisco Systems, Ricoh Systems, and Texas Instruments. He has written technical papers on hardware and software design methods, and has taught courses on Verilog, ASIC design, and FPGA design at conferences throughout the world. He holds a Master's degree from Stanford University and two Bachelor's degrees from Cornell University.
"About this title" may belong to another edition of this title.
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