Wainwright, W.W. Dental Radiology

ISBN 13: 9780070677500

Dental Radiology

 
9780070677500: Dental Radiology
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Detailing the latest techniques in low-voltage VLSI design, Yeo (electrical and electronic engineering, Nanyang Technological University, Singapore) and Roy (electrical and computer engineering, Purdue University) provide access to proven design techniques in CMOS, biCMOS, and other in-demand applications. They introduce new approaches to the challenges of silicon-level design for low-power circuitry pacing electronics and ICs, and present low-power solutions for adders, multipliers, ROMs, SRAMs, DRAMs, and signal processors. The readership for the book includes electronic and IC designers. Sci-Tech Book News 20041201

About the Author:

Kiat-Seng Yeo, Ph.D., is a recognized expert in CMOS technology and IC design. Sub-Dean and Associate Professor of Electrical and Electronic Engineering at Nangyang Technological University in Singapore, he has published over 130 papers in his areas of expertise. Kaushik Roy, Ph.D., is Professor of Electrical Engineering at Purdue University and a widely known authority on circuit design. Author of more than 200 papers in refereed journals and conferences, he serves on the editorial boards of IEEE Design and Test, IEEE Transactions on Circuits and Systems, and IEEE Transactions on VLSI Systems.

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Book Description McGraw Hill Education, 2009. Softcover. Book Condition: New. First edition. Designers developing the low voltage, low power chips that enable small, portable devices, face a very particular set of challenges. This monograph details cutting-edge design techniques for the low power circuitry required by the many new miniaturized business and consumer products driving the electronics market. Table of contents Chapter 1: Low-Power CMOS VLSI Design Chapter 2: Circuit Techniques for Low-Power Design Chapter 3: Low-Voltage Low-Power Adders Chapter 4: Low-Voltage Low-Power Multipliers Chapter 5: Low-Voltage Low-Power Read-Only Memories Chapter 6: Low-Voltage Low-Power Static Random-Access Memories Chapter 7: Low-Voltage Low-Power Dynamic Random-Access Chapter 8: Large Low-Power VLSI System Design and Applications Index Printed Pages: 585. Bookseller Inventory # 25000

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Book Description McGraw Hill Education, 2009. Softcover. Book Condition: New. First edition. Designers developing the low voltage, low power chips that enable small, portable devices, face a very particular set of challenges. This monograph details cutting-edge design techniques for the low power circuitry required by the many new miniaturized business and consumer products driving the electronics market. Table of contents Chapter 1: Low-Power CMOS VLSI Design Chapter 2: Circuit Techniques for Low-Power Design Chapter 3: Low-Voltage Low-Power Adders Chapter 4: Low-Voltage Low-Power Multipliers Chapter 5: Low-Voltage Low-Power Read-Only Memories Chapter 6: Low-Voltage Low-Power Static Random-Access Memories Chapter 7: Low-Voltage Low-Power Dynamic Random-Access Chapter 8: Large Low-Power VLSI System Design and Applications Index Printed Pages: 585. Bookseller Inventory # 25000

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